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4559 Datasheet(PDF) 80 Page - Renesas Technology Corp |
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4559 Datasheet(HTML) 80 Page - Renesas Technology Corp |
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80 / 148 page  Rev.1.04 Aug 23, 2007 Page 80 of 146 REJ03B0188-0104 4559 Group Note 1. “R” represents read enabled, and “W” represents write enabled. Note 2. To be invalid (K22 = “0”) key-on wakeup of ports P30 and P31, set the registers K30 and K31 to “0.” Note 3. To be invalid (K23 = “0”) key-on wakeup of ports P32 and P33, set the registers K32 and K33 to “0.” Key-on wakeup control register K0 at reset : 00002 at power down : state retained R/W TAK0/TK0A K03 Ports P12, P13 key-on wakeup control bit 0 Key-on wakeup not used 1 Key-on wakeup used K02 Ports P10, P11 key-on wakeup control bit 0 Key-on wakeup not used 1 Key-on wakeup used K01 Ports P02, P03 key-on wakeup control bit 0 Key-on wakeup not used 1 Key-on wakeup used K00 Ports P00, P01 key-on wakeup control bit 0 Key-on wakeup not used 1 Key-on wakeup used Key-on wakeup control register K1 at reset : 00002 at power down : state retained R/W TAK1/TK1A K13 Port P23 key-on wakeup control bit 0 Key-on wakeup not used 1 Key-on wakeup used K12 Port P22 key-on wakeup control bit 0 Key-on wakeup not used 1 Key-on wakeup used K11 Port P21 key-on wakeup control bit 0 Key-on wakeup not used 1 Key-on wakeup used K10 Port P20 key-on wakeup control bit 0 Key-on wakeup not used 1 Key-on wakeup used Key-on wakeup control register K2 at reset : 00002 at power down : state retained R/W TAK2/TK2A K23 Ports P32, P33 key-on wakeup control bit (Note 3) 0 Key-on wakeup not used 1 Key-on wakeup used K22 Ports P30, P31 key-on wakeup control bit (Note 2) 0 Key-on wakeup not used 1 Key-on wakeup used K21 INT pin return condition selection bit 0 Return by level 1 Return by edge K20 INT pin key-on wakeup control bit 0 Key-on wakeup invalid 1 Key-on wakeup valid Key-on wakeup control register K3 at reset : 00002 at power down : state retained R/W TAK3/TK3A K33 Ports P32, P33 return condition selection bit (Note 3) 0 Return by level 1 Return by edge K32 Ports P32, P33 valid waveform/level selection bit (Note 3) 0 Falling waveform/”L” level 1 Rising waveform/”H” level K31 Ports P30, P31 return condition selection bit (Note 2) 0 Return by level 1 Return by edge K30 Ports P30, P31 valid waveform/level selection bit (Note 2) 0 Falling waveform/”L” level 1 Rising waveform/”H” level |
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