PM7346 datasheet(111/419 Pages) PMC

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PM7346 S/UNI-QJET

DATASHEET

PMC-960835

ISSUE 6

SATURN QUAD USER NETWORK INTERFACE FOR J2, E3, T3

PMC-SIERRA, INC. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA INC., AND ITS CUSTOMERS’ INTERNAL USE 90

LLOOP:

The LLOOP bit controls the line loopback. When a logic 0 is written to

LLOOP, line loopback is disabled. When a logic 1 is written to LLOOP, the

stream received on RPOS/RDATI and RNEG/RLCV/ROHM is looped to the

TPOS/TDATO and TNEG/TOHM outputs. Note that the TPOS, TNEG, and

TCLK outputs are referenced to RCLK when LLOOP is logic 1.

LOOPT:

The LOOPT bit selects the transmit timing source. When a logic 1 is written

to LOOPT, the transmitter is loop-timed to the receiver. When loop timing is

enabled, the receive clock (RCLK) is used as the transmit timing source. The

transmit nibble stuffing is derived from the nibble stuffing in the receive PLCP

frame (for DS3 or E3 PLCP frame transmission). The FIXSTUFF bit must be

set to logic 0 if the LOOPT bit is set to logic 1. When a logic 0 is written to

LOOPT, the transmit clock (TICLK) is used as the transmit timing source. The

nibble stuffing is derived from the REF8KI input, or is fixed internally (as

determined by the FIXSTUFF bit in the SPLT Configuration Register (for DS3

or E3 PLCP frame transmission only). Setting the LOOPT bit disables the

effect of the TICLK and TXREF bits in the S/UNI-QJET Transmit Configuration

and S/UNI-QJET Configuration 2 registers respectively, thereby forcing flow-

through timing.

FRMRONLY:

The FRMRONLY bit controls whether the S/UNI-QJET is operating solely as a

DS3, E3, or J2 framer/transmitter. If FRMRONLY is set to logic 1, the PLCP,

and ATM blocks are disabled and the RDATO, REF8KO/RFPO/RMFPO,

RSCLK, ROVRHD, TFPO/TMFPO, TFPI/TMFPI, and TDATI I/O pins are

enabled. The ATM interface inputs are ignored and the outputs are tri-stated.

If FRMRONLY is set to logic 0, the PLCP and ATM blocks are enabled and

the LCD, RPOH, RPOHCLK, RPOHFP, TPOH, TIOHM, and TPOHFP I/O pins

are enabled and the ATM interface inputs and outputs are enabled.

TOCTA:

The TOCTA bit enables octet-alignment or nibble-alignment of the transmit

cell stream to the transmission overhead when the arbitrary transmission

format is chosen (TFRM[1:0] = 11 binary and SPLT Configuration register bit

EXT = 1). This bit has no effect when DS3, G.751 E3, G.832 E3, J2, T1, or

E1 formats are selected since octet or nibble alignment is specified for these

formats. When the arbitrary transmission format is chosen and TOCTA is set

to logic 1, the ATM cell nibbles or octets are aligned to the arbitrary

transmission format overhead boundaries (as set by the TIOHM input).

Nibble alignment is chosen if the FORM[1:0] bits in the SPLT Configuration

PM7346 Datasheet(PDF) 111 Page - PMC-Sierra, Inc

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