ACT2861 datasheet(68/97 Pages) QORVO

68 / 97 page

Data Sheet Rev. F, April 2022 | Subject to change without notice

68 of 97

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ACT2861

30V Buck-Boost Charger with Integrated MOSFETs and OTG

REG 0x00: Main Control 1 (R/W) (VM)

Bit

Name

Description

Comment

HIZ

0: Not in HIZ mode

1: In HIZ mode

Bit to control if IC is in HIZ mode.

If set to 1, EN_CHG will NOT enable switching for

charger or and nOTG pin will not enable OTG mode. In

addition, the OVERRIDE_EN_CHG or the

OVERRIDE_nOTG Registers will not enable the

converter.

OVERRIDE_EN_CHG

0: No Effect

1: Override EN_CHG

Input

0: No effect

1: This will override the EN_CHG pin and allow the

charging to start, even if the EN pin is low. With this set

HI, enable pin will have no effect on charging. HIZ will

still need to be set to 0 to allow Charging.

SHIPM_ENTER

0: No Change

1: Device enters ship

mode

Write to 1 clears register after 1 sec

0: Normal Mode

1: Disables everything and device enters Ship Mode

after a 1 second delay. During the 1 second countdown

this bit will stay high. If user wants to cancel the enter

ship mode during the 1 sec delay, write this back to 0,

and ship mode will not be entered.

Warning: Entering ship mode disables everything and

must be re-enabled with SHIPM pin or VIN supply.

GPIO_OUT

0: Output in HIZ

1: Output pulled low

GPIO output register

Only available in ACT2862 (No OTG Mode)

DIS_nCHG_CHG

0: Enable

1: Disable

If set to 1, nCHG Charge pin is always HIZ in Charger

mode.

WATCHDOG_RESET

0: Normal

1: Reset

I2C Watchdog Timer Reset

This must be written to 1 before Watchdog timer expires,

if Watchdog timer is enabled. This is auto clearing when

writing to a 1.

Audio Frequency Limit

0: No limit

1: Minimum 31.25kHz

0: No limit of switching frequency

1: Set minimum switching frequency to 31.25kHz to

avoid audio noise

For both OTG and Charge mode.

REGISTER_RESET

1: Reset Registers to

Default

set reset register back to 0.

ACT2861 Datasheet(PDF) 68 Page - Qorvo, Inc

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