ACT2861 datasheet(27/97 Pages) QORVO

27 / 97 page

Data Sheet Rev. F, April 2022 | Subject to change without notice

27 of 97

www.qorvo.com

ACT2861

30V Buck-Boost Charger with Integrated MOSFETs and OTG

PIN FUNCTIONS

VIN

VIN is the ACT2861 input power pin when in CHARGE

mode. It is also the input voltage sense input. VIN is the

ACT2861 output power pin when in OTG mode. The

OTG output voltage is regulated at the VIN pin. Connect

input bypass capacitors directly between VIN and

PGND.

ISRP

ISRP is the positive sense pin for input current sensing

when the ACT2861 is in Charge mode. It is the negative

sense pin for output current sensing when the IC in in

OTG mode. ISRP requires an input RC filter. Refer to

the Setting Charge Current section for more details.

ISRP must be Kelvin connected to the input current

sense resistor. Connect the input current sense resistor

between ISRP and ISRN.

ISRN

ISRN is the negative sense pin for input current sensing

when the ACT2861 is in Charge mode. It is the positive

sense pin for output current sensing when the IC in in

OTG mode. ISRN requires an input RC filter. Refer to

the Setting Charge Current section for more details.

ISRN must be Kelvin connected to the input current

sense resistor. Connect the input current sense resistor

between ISRP and ISRN.

SW1, SW2

SW1 and SW2 are the switch nodes for the internal

buck-boost converter. SW1 switches between VIN and

PGND when the IC operates in buck and buck-boost

modes. SW2 switches between VBAT and PGND when

the IC operates in buck-boost and boost modes. Con-

nect the inductor between the SW1 and SW2 pins.

HSB1, HSB2

HSB1 and HSB2 provide power to the internal high-side

MOSFET gate driver circuitry. Connect a 47nF capaci-

tor from HSB1 to SW1. Connect a 47nF capacitor from

HSB2 to SW2.

VBAT

VBAT is the battery charger output power pin when in

CHARGE mode. Is the input power pin in OTG mode

Connect input bypass capacitors directly between

VBAT and PGND.

VBATS

VBATS is the battery voltage sense pin. The battery

voltage is regulated at the VBATS pin. Kelvin connect

input VBATS as close to the battery input terminals as

possible.

OSRP

OSRP is the positive sense pin for battery charge cur-

rent sensing when the ACT2861 is in Charge mode. It

is the negative sense pin for the input battery current

sensing when the IC in in OTG mode. OSRP requires

an input RC filter. Refer to the Setting Charge Current

section for more details. OSRP must be Kelvin con-

nected to the battery charge current sense resistor.

Connect the battery charge current sense resistor be-

tween OSRP and OSRN.

OSRN

OSRN is the negative sense pin for battery charge cur-

rent sensing when the ACT2861 is in Charge mode. It

is the positive sense pin for input battery current sensing

when the IC in in OTG mode. OSRN requires an input

RC filter. Refer to the Setting Charge Current section

for more details. OSRN must be Kelvin connected to the

battery charge current sense resistor. Connect the bat-

tery charge current sense resistor between OSRP and

OSRN.

ILIM

ILIM sets the maximum input current in CHARGE mode.

It sets the maximum output current in OTG mode. Con-

nect a resistor between ILIM and AGND to set the cur-

rent limits. The ILIM current limit can be scaled using

I2C. In some operating conditions, ILIM requires addi-

tional RC compensation. Refer to the Charging – Max-

imum Current Input section for more details.

OLIM

OLIM sets the maximum battery charge current in

CHARGE mode. It sets the maximum battery input cur-

rent in OTG mode. Connect a resistor between OLIM

and AGND to set the current limits. The OLIM current

limit can be scaled using I2C. In some operating condi-

tions, OLIM requires additional RC compensation. Re-

fer to the Setting Charge Current section for more de-

tails.

INTBP

INTBP is the internal bias voltage output pin. INTBP is

supplied by an internal linear regulator. Do not power

external circuity from the INTBP pin. Connect a 100nF

ceramic capacitor between INTBP and AGND.

VREG

VREG is the internal LDO output pin. The internal LDO

is programmable between 2V and 5.1V. Its maximum

output current capability 100mA. Connect a 1uF ce-

ramic capacitor between VREG and AGND. For

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