ACT2861 datasheet(81/97 Pages) QORVO

81 / 97 page

Data Sheet Rev. F, April 2022 | Subject to change without notice

81 of 97

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ACT2861

30V Buck-Boost Charger with Integrated MOSFETs and OTG

REG 0x0E: OTG Mode Control 1 (R/W) (NVM)

Bit

Name

Description

Comment

OTG_EN

0: Disable

1: Enable

If this bit is low, OTG mode is always disabled. If this

pin is High, then either the nOTG pin or the

EN_OTG_OVERRIDE bit will enable the OTG Mode.

In addition, the HIZ mode bit (Reg 0x00, bit 7) must

be low.

OTG_EN_OVERRIDE

0: Disable

1: Enable

If this bit is high, nOTG pin is over written and OTG

mode is enabled by the EN_OTG bit. This allows

user to enable OTG from I2C without using the nOTG

pin.

OTG_SS

0: 1.5ms

1: 5ms

Soft start time for OTG output voltage:

RFU

Reserved for future use

OTG_OFF_DLY[1]

00: Disable

01: 10s

10: 20s

11: 30s

When light load is detected for the setting time, the

OTG is disabled and latched off. The OTG must be

disabled and re-enabled to turn OTG back on. This

can be done with the nOTG Pin, or through the

OTG_EN Register

OTG_OFF_DLY[0]

nOTG_PIN_POLARITY

0: Active Low

1: Active High

Controls the polarity of the nOTG input pin.

OTG_OFF_LOAD_EN

0: Disable

1: Enable

When light load is detected for longer than the

OFF_DLY time, the converter is disabled and latched

off. The converter must be disabled and re-enabled

to turn back on. This can be done with the EN pin or

the EN register bit.

ACT2861 Datasheet(PDF) 81 Page - Qorvo, Inc

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