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ACT2861 Datasheet(PDF) 74 Page - Qorvo, Inc

Part # ACT2861
Description  30V Buck-Boost Charger with Integrated MOSFETs and OTG
PDF  97 Pages
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Manufacturer  QORVO [Qorvo, Inc]
Direct Link  https://www.qorvo.com/
Logo QORVO - Qorvo, Inc

ACT2861 Datasheet(HTML) 74 Page - Qorvo, Inc

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Data Sheet Rev. F, April 2022 | Subject to change without notice
74 of 97
www.qorvo.com
© 2020 Qorvo US, Inc. All rights reserved. Confidential
ACT2861
30V Buck-Boost Charger with Integrated MOSFETs and OTG
®
REG 0x06: Faults 2 (Read only) (VM)
Bit
Name
Description
Comment
7
WATCHDOG_FA
ULT
0
0: No Fault
1: Watchdog Fault
Watchdog Timeout Fault
This bit is latching. If Watchdog is enabled and watchdog
timer times out, then this bit is set high.
This bit is not cleared when read. The watchdog timer is
cleared with a watchdog read or by disabling the watchdog
timer.
6
OTG_VOUT_FAU
LT
0
0: No Fault
1: OTG VOUT Fault
OTG Hiccup Mode Fault
This bit is latching. Read this bit to clear the value back to
0. If the VOUT enters hiccup state because current
exceeds the Constant Current Mode, then this bit gets set.
This register will always be set during hiccup mode when
VOUT is off during the 3sec restart time and converter is in
the HICCUP state. After it exits this state, a read clears
this bit.
5
OTG_VBAT_CUT
OFF_FLT
0
0: No Fault
1: OTG VBAT CUTOFF Fault
OTG VBAT Cutoff Fault
This bit is latching. If VBAT falls below the VOTG_VBAT_CUTOFF
Voltage specified in the OTG_VBAT_CUTOFF Register
(Reg 0x0F, Bits 7:5), this bit is set to 1.
When
the
battery
voltage
is
above
the
OTG_VBAT_CUTOFF voltage, a read will clear this fault bit.
4
OTG_VOUT_OV
0
0: No Fault
1: VOUT OV Fault
OTG Vout Overvoltage Fault
Read to Clear latching bit
This bit will be set any time the Vout exceeds the OV
threshold for external or internal feedback. The VOUT
must be below the OV voltage and then a read will clear
this fault bit.
3
OTG_LIGHT_LO
AD
0
0: No Fault
1: OTG Off
Output Light Load State Latch
This bit is latching. This bit is set when the converter has
been disabled because of light load condition on output
and it entered the LL_DIS state. After the IC exits the
LL_DIS state, a read clears this bit.
2
OTG_VBAT_OV
0
0: No Fault
1: OTG VBAT OV
OTG VBAT Overvoltage fault
This bit is latching. This bit is set any time VBAT exceeds
the OV threshold in OTG mode. VBAT must be below the
OV voltage and then a read clears this bit.
1
I2C_FAULT
0
0: No Fault
1: I2C Fault
If set to 1, I2C command did not finish correctly or errors
on I2C data
0
DEADBATTERY
0
0: Battery above 3V
1: Battery below 3V
If charging and battery is below 3V, this bit gets set to 1.
This is a real-time indicator.



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