ACT2861 datasheet(34/97 Pages) QORVO

34 / 97 page

Data Sheet Rev. F, April 2022 | Subject to change without notice

34 of 97

www.qorvo.com

ACT2861

30V Buck-Boost Charger with Integrated MOSFETs and OTG

Battery Charge Management

The ACT2861 charges 2 ~ 5 cell Li-Ion battery with up

to 5A charge current for high capacity batteries. The de-

fault charging profile is configured for Li-Ion batteries,

but the ACT2861 I2C configurability allows the IC to

charge any battery chemistry.

Autonomous (stand-alone) Charging Cycle

With battery charging enabled at POR, the ACT2861

autonomously charges a 2 ~ 5 cell Li-Ion battery. The

IC automatically detects the battery’s state of charge

and starts charging in the proper charge state. It com-

pletes full or partial charging cycles without host inter-

vention. Note that when performing stand-alone charg-

ing, the IC’s default CMI must match the battery require-

ments. This includes the number of cells being charged,

their termination voltage, fastcharge current, precharge

current, and shorted battery current. The CMI Options

section shows the default settings for each available

CMI option. Contact Qorvo for additional information

about other configurations. Note that the WATCHDOG

bits must be set to 00 to disable the watchdog timer in

stand-alone charging mode.

Charger Enable / Disable

The ACT2861 can only enter Charge mode from HIZ

mode. Note that if the IC is commanded to enter both

OTG mode and Charge mode at the same time, OTG

mode takes precedence. When in HIZ mode, the

charger can be enabled with the EN_CHG pin or by I2C.

To enable the charger with the EN_CHG pin, pull the

pin above 0.8V. To disable the charger, pull it below

0.8V. EN_CHG connects to a comparator with a 0.8V

threshold. The EN_CHG pin is 5V compliant, so it can

be pulled up to 5V even when power is not applied to

the IC. Connect a resistor divider to EN_CHG to set up

a UVLO threshold to start charging. This is useful when

the system should not start charging until the input volt-

age goes above a specific value.

The charger can also be enabled with the I2C bit OVER-

RIDE_EN_CHG bit in register 0x00h. Setting this bit = 1

overrides the EN_CHG pin and forces the IC into

Charge mode. When this bit = 0, the EN_CHG pin is

used to enter Charge mode. Figure 8 shows both the

hardware and I2C conditions required to enter Charge

mode.

Note that in all cases, the I2C bit HIZ in register 0x00h

must be = 0 to enter Charge mode. When the HIZ bit =

1, the IC is forced into HIZ mode and both OTG mode

and Charge mode are disabled.

HIZ Bit = 0

EN_CHG pin = 1

OVERRIDE_EN_CHG bit = 1

nOTG pin = 1

OTG_EN_OVERRIDE bit = 0

HIZ to

Charge

Mode

Figure 8: Conditions to Enter Charge Mode from HIZ

Mode

After the IC is in Charge mode, the conditions to exit

charge mode change. While in Charge mode, the nOTG

pin and I2C bits cannot be used to exit Charge mode.

When the charger is disabled, the IC state machine

must go to HIZ mode or to SHIP mode. To disable the

charger and go to HIZ mode, pull the EN_CHG pin low

and set bit OVERRIDE_EN_CHG = 0. Setting bit HIZ =

1 overrides all other settings and disables the charger

and puts the IC into HIZ mode. The IC must go to HIZ

mode before going to OTG mode. The charger can also

be disabled by putting the IC into SHIP mode.

HIZ Bit = 1

EN_CHG pin = 0

OVERRIDE_EN_CHG bit = 0

Charge

to HIZ

Mode

Figure 9: Conditions to Enter HIZ Mode from Charge

Mode

ACT2861 Datasheet(PDF) 34 Page - Qorvo, Inc

ACT2861 Datasheet(HTML) 34 Page - Qorvo, Inc

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