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ACT2861 Datasheet(PDF) 43 Page - Qorvo, Inc

Part # ACT2861
Description  30V Buck-Boost Charger with Integrated MOSFETs and OTG
PDF  97 Pages
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Manufacturer  QORVO [Qorvo, Inc]
Direct Link  https://www.qorvo.com/
Logo QORVO - Qorvo, Inc

ACT2861 Datasheet(HTML) 43 Page - Qorvo, Inc

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Data Sheet Rev. F, April 2022 | Subject to change without notice
43 of 97
www.qorvo.com
© 2020 Qorvo US, Inc. All rights reserved. Confidential
ACT2861
30V Buck-Boost Charger with Integrated MOSFETs and OTG
®
Where VOTG_VOUT[9:0] is the decimal equivalent of
the
value
in
this
register.
For
example,
if
OTG_VOUT[9:0] = 0111000100b (452 decimal), the
output voltage = 2.96V + 0.02V * 452 = 12.00V.
When changing from one OTG output voltage to an-
other, the slew rate is programmable between 1V/ms
and 0.1V/ms by I2C bits OTG_OUTPUT_SLEW[1:0] in
register 0x10h. This allows the output to conform to
QC2.0/QC3.0/USB PD functions for higher output volt-
ages.
The battery voltage must always stay above the mini-
mum
allowable battery
voltage set by I2C bits
VBAT_LOW[6:0]
in
register
0x1Ah
and
OTG_VBAT_CUTOFF[2:0] in register 0x0Fh. The ac-
tual voltage is the VBAT_LOW voltage minus the
OTG_VBAT_CUTOFF voltage. If the battery voltage
drops below this value, the IC turns off the OTG output
and goes to the OTG_RST state.
OTG Active Discharge
When changing the OTG output voltage to a higher level,
the switcher ramps the output voltage by the pro-
grammed slew rate. When the output voltage is pro-
grammed from a higher to a lower voltage, the voltage
drops at a rate determined by the output capacitance
and the load current. To minimize the fall time in no-load
conditions, the ACT2861 can provide a 70mA sink when
the output is transitioning to a lower output voltage. En-
able this feature by writing 1 into I2C bit OTG_PULL-
DOWN_RAMP. The 70mA load turns on until the output
voltage goes into regulation.
OTG Enable Delay
Once the OTG has the valid conditions for startup, the
OTG Enable Delay timer is enabled. The timer options
allow a 0ms to 1s delay. The OTG startup delay is con-
trolled by the I2C bits OTG_EN_DLY[1:0]
OTG Mode Soft Start
After the OTG Enable Delay has completed, the IC
starts the output using a soft start function programma-
ble by the I2C bits OTG_SS in register 0x0Eh. The
softstart time is independent of the output voltage set-
ting.
OTG Mode Constant Output Current
Regulation
After OTG mode soft start has completed, the IC moni-
tors the current on VIN input side sense resistor (ISRP
and ISRN) to provide constant current protection and
regulation in OTG mode. When the OTG output current
exceeds programmed value set by the ILIM pin and the
OTG_CC register, the switching converter changes to
output constant current mode and regulates a fixed out-
put current. In this case, the output voltage may drop if
the load resistance continues to decrease.
The maximum OTG output current is set by the same
resistor as the charger input current, Rcs_IN. Rcs_IN must
be set for the larger of the charge current or OTG cur-
rent. The maximum allowable OTG output current is 5A.
The actual output current limit, IOTG_OUT_LIM can be
scaled between 1% to 100% of IILIM in 1% steps. The
following equation defines the final OTG output current
limit.
������������������������������������������������_������������������������������������_������������������������������������=������������������������������������������������������������∗������������������������������������_������������������������[6:0]
Where IILIM is the hardware programmed current limit
(see the Charging – Maximum Input Current section
for details) and OTG_CC[6:0] is the scaling factor.
OTG_CC[6:0] is the decimal equivalent value in this
register. For example, if IILIM, is programmed to 5A and
OTG_CC[6:0] = 0111100b (60% decimal), the final
charge current = 5A * 0.60 = 3A.
Note that OTG_CC[6:0] is a 7 bit register and can be
programmed between 0x00h and 0x7Fh (0% and
127%). If a value of 0x00h is written to the register, the
register retains 0x00h, but the IC sets the OTG scaling
factor to 1%. If a value above 0x64h (100%) is written
to the register, the IC retains the value, but sets the scal-
ing factor to 100%
The OTG regulation mode can be monitored in real time
by I2C bit OTG_Output_CC in register 0x20h. When this
bit = 0, the IC is regulating in output constant voltage
mode. When this bit = 1, the IC is regulating in constant
current mode. If the output drops below 3V, the IC as-
sumes an output fault has occurred and disables the
output for 3s. This is the OTG_HICCUP state. After 3s,
the state machine goes to OTG_RST and restarts. If a
short or high current fault is present after the restart, the
IC cycles back to OTG_HICCUP and OTG_RST. This
cycle continues indefinitely until OTG is disabled or the
fault is removed.
OTG Mode Constant Input Current Regulation
At all times during OTG mode, the IC monitors the cur-
rent on VBAT output side sense resistor (OSRP and
OSRN) to provide battery current protection.
The maximum OTG input current is set by the same re-
sistor as the charger output current, RCS_OUT. Unlike the
RCS_IN resistor, RCS_OUT does not have to be set to the
larger of the charge current or OTG input current. The
maximum allowable OTG input current is 5A. The max-
imum OTG input current limit, IOTG_IN_LIM, is a scaled ver-
sion of the programmed charge current, ICHG. IOTG_IN_LIM
is scaled to 150% or 200% of ICHG. This allows a larger
battery discharge current than charge current. The I2C



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