ACT2861 datasheet(69/97 Pages) QORVO

69 / 97 page

Data Sheet Rev. F, April 2022 | Subject to change without notice

69 of 97

www.qorvo.com

ACT2861

30V Buck-Boost Charger with Integrated MOSFETs and OTG

REG 0x01: Main Control 2 (R/W) (NVM)

Bit

Name

Description

Comment

DIS_TH

0: Enable

1: Disable

Set 1 to disable TH output and the JEITA Control. During

this mode, charger and OTG mode will always operate at

full current and voltage settings.

Note: This must be set to 1 to achieve the lowest possible

input current.

DIS_OCP_SHUTDO

0: Enable

1: Disable

If set to 0, the device will be disabled if FET cycle by cycle

current limit is detected for 8 (or 16) continuous cycles. For

both Charge and OTG modes.

Uses the FET_LIMIT

DIS_VBAT_OVP

0: Enable

1: Disable

When set to 1, a BAT_OVP fault does not latch off the

charger in a fault mode. Charger will restart automatically

when the OVP condition is removed.

FET_ILIMIT

0: 8.5A

1: 10A

This is the cycle by cycle current limit setting for ALL FETS

in any operating mode:

VIN_OV_RESTART_

DELAY

0: 40ms

1: 100usec

Delay time to restart in charger mode after Input OV fault

has been removed

VREG_EN

0: Turn OFF VREG

1: Turn ON VREG

Control VREG on/off

Default is on.

WATCHDOG[1]

00: Disable timer

01: 80s

10: 160s

11: 320s

I2C Watchdog Timer Setting

Watchdog timer is always disabled and reset to 0 in HIZ

Mode.

When Disabled, Watchdog timer is also reset to 0.

WATCHDOG[0]

ACT2861 Datasheet(PDF) 69 Page - Qorvo, Inc

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