ACT2861 datasheet(41/97 Pages) QORVO

41 / 97 page

Data Sheet Rev. F, April 2022 | Subject to change without notice

41 of 97

www.qorvo.com

ACT2861

30V Buck-Boost Charger with Integrated MOSFETs and OTG

Table 6: Fast Charge Safety Timer Response

Condition

Charge Response

Fast Charge Safety Timer Speed

Normal Fast Charge

NONE

Full Speed

VIN Input Regulation

Reduced Charge Current

½ Speed

IIN Input Current Regulation

Reduced Charge Current

½ Speed

Thermal Die Regulation

Reduced Charge Current

½ Speed

Battery Temp Exceed Limits

Suspend Charge

Suspend

Battery Temp Hot or Cold

Reduced Charge Current or

VTERM

½ Speed

Table 7: Low Battery Safety Timer Response

Condition

Charge Response

Low Battery Safety Timer Speed

Normal SCOND or PCOND Charge

NONE

Full Speed

VIN Input Regulation

Reduced Charge Current

½ Speed

IIN Input Current Regulation

Reduced Charge Current

½ Speed

Thermal Die Regulation

Reduced Charge Current

½ Speed

Battery Temp Exceeds JEITA T0 or T6 Limits

Suspend Charge

Suspend

Battery Temp Exceeds JEITA T1-T2 or T3-T5 Limits

NONE

Full Speed

Safety Timer Configuration Change

When the safety timer value needs to be changed, it is

recommended that the timer is first disabled. Then

change the FC_SAFETY_TIMER[4:0] register. Disable

the

safety

timer

writing

into

I2C

bit

DIS_SAFETY_TIMER in register 0x1Bh. This proce-

dure ensures the safety timer properly restarts after new

value is configured.

Charger – Input Capacitor Selection

Note that the Charger CIN capacitors are also the OTG

output capacitors. They are connected to VIN. The input

capacitance should be a combination of ceramic and

bulk capacitance.

If the design only uses Charge mode and does not use

OTG mode, 22uF to 47uF capacitors are typically ac-

ceptable, but the final value is application dependent.

Choose the input capacitor value to keep the input volt-

age ripple less than ~50mV. The input capacitance can

be increased without limit.

CCHG_IN=I��∗VBATVIN∗�1−VBATVIN�

FSW∗Vripple

Where CCHG_IN is the charging input capacitance (OTG

output capacitance) in uF, ICHG is the charging current in

Amperes, VBAT is the battery voltage in volts, VIN is the

input voltage in volts, FSW is the switching frequency in

Hz, and Vripple is the maximum input voltage ripple in

volts.

An additional 100uF bulk electrolytic capacitor is recom-

mended.

If the design uses OTG Mode, refer to the OTG Output

Capacitor Selection. The OTG Mode capacitor require-

ments take precedence over Charging input capaci-

tance.

Be sure to consider the input capacitor’s DC bias effects.

A capacitor’s actual capacitance is strongly affected by

its DC bias characteristics. The input capacitor is typi-

cally an X5R, X7R, or similar dielectric. Use of Y5U, Z5U,

or similar dielectrics is not recommended.

Input capacitor placement is critical for proper operation.

The input ceramic capacitor must be placed as close to

the IC as possible. The traces from VIN to the capacitor

and from the capacitor to PGND should as short and

wide as possible. Refer to the Layout Guidelines selec-

tion and to the EVK layout for details.

ACT2861 Datasheet(PDF) 41 Page - Qorvo, Inc

ACT2861 Datasheet(HTML) 41 Page - Qorvo, Inc

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97

Datasheet Download

Link URL