IMX93CEC datasheet(17/123 Pages) NXP

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Cortex A55 Platform

CPU #0

L1 Cache

L3 Controller & SCU

VDD_SOC

VDD_BBSM_0P8

NVCC_XXX

VDD_ANA_0P8

VDD_USB_3P3

VDD_USB_0P8

VDD2_DDR

VDD_DRAM_PLL_0P8

AONMIX, ANAMIX,

HSIOMIX, CCMSRCGPCMIX

BBSM_LP Logic

BBSM I/O

eFuse

3.3V GPIO PAD

1.8V GPIO PAD

PLLs

MIPI PHYs

DRAM PLL

0.65 V

0.80 V

0.85 V

0.9 V

3.3 V

1.8 V

1.8 V BBSM

1.1V

DRAM I/O

VDDA_1P8_XTAL

VDD_USB_1P8

VDDA_1P8_TSENSE

VDDA_1P8_EFUSE

VDD_ANAx_1P8

VDDA_1P8_PLL

VDDD_0P8_PLL

NVCC_BBSM_1P8

VDD_ARM_PLL_1P8

VDD_ARM_PLL_0P8

ARM PLL

0.8 V LDO

Regulator

VDD_DRAM_PLL_1P8

WAKEUPMIX logic

WAKEUPMIX

NIC_CENTRAL, GIC-600

SoC Top-level

DRAM Controller

DDRMIX

L2 Cache

NICMIX

LCDIF, ISI, MIPI

Controller, PXP

MEDIAMIX

ADC

VDDA_1P8_ADC *

3.3/1.8 V

SD Card GPIOPAD

OCRAM

Filter

DRAM PHY

NVCC_SD

Temperature Sensor

XTAL

VDDA_0P8_TSENSE

0.8 V

Analog

CPU #1

L1 Cache

L2 Cache

L3 Cache Memory

USB PHYs

LVDS PHY

Optional 0.6 V

DRAM I/O

(LPDDR 4x only)

VDDQ_DDR

VDD_MIPI_0P8

VDD_MIPI_1P8

VDD_LVDS_1P8

ML IP

MLMIX

Figure 3. Power architecture of I.MX 93 family of processors

Note: If ADC is used, external voltage reference is recommended for VDD_ANAx_1P8 to improve the ADC ENOB.

NXP Semiconductors

IMX93CEC

i.MX 93 Applications Processors Data Sheet for Commercial Products

IMX93CEC

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 7 — 12 February 2026

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