IMX93CEC datasheet(5/123 Pages) NXP

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Table 1. Features ...continued

Subsystem

Features

Flexible power domain partitioning with internal power switches to support efficient

power management

Connectivity

Two USB 2.0 controllers and PHYs interfaces

Two Controller Area Network (FlexCAN) modules, each optionally supporting flexible

data-rate (FD)

Two Improved Inter Integrated Circuit (I3C) modules

Two 32-pin FlexIO modules

Three Ultra Secure Digital Host Controller (uSDHC) interfaces

Two Ethernet controllers (capable of simultaneous operation):

• One Gigabit Ethernet controller with support for Energy Efficient Ethernet (EEE),

Ethernet AVB, and IEEE 1588

• One Gigabit Ethernet controller with support for TSN in addition to EEE, Ethernet

AVB, and IEEE 1588

Eight Low Power SPI (LPSPI) modules

Eight Low Power I2C modules

Eight Low Power Universal Asynchronous Receiver/Transmitter (LPUART) modules:

• Programmable baud rates up to 5 Mbps

One Analog-to-Digital Converter (SAR ADC) module

• 12-bit 4-channel with 1 MS/s

Security

Trusted Resource Domain Controller (TRDC)

• Supports 16 domains

Arm® TrustZone® (TZ) architecture, including both Trustzone-A and Trustzone-M

On-chip RAM (OCRAM) secure region protection using OCRAM controller

EdgeLock® secure enclave

Battery Backed Security Module (BBSM)

• Secure real-time clock (RTC)

System debug

Arm® CoreSight™ debug and trace technology

Embedded Trace FIFO (ETF) with 4 KB internal storage to provide trace buffering

Unified trace capability for dual core Cortex®-A55 and Cortex®-M33 CPUs

Table continues on the next page...

NXP Semiconductors

IMX93CEC

i.MX 93 Applications Processors Data Sheet for Commercial Products

IMX93CEC

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 7 — 12 February 2026

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