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IMX93CEC Datasheet(PDF) 92 Page - NXP Semiconductors |
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IMX93CEC Datasheet(HTML) 92 Page - NXP Semiconductors |
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92 / 123 page  Table 102. 11 x 11 mm functional contact assignment ...continued Ball name 11 x 11 ball Power group Ball Types Default setting Default modes Default function Status while reset is asserted MIPI_DSI1_D2_N A8 MIPI_DSI1_VPH PHY — — — MIPI_DSI1_D2_P B8 MIPI_DSI1_VPH PHY — — — MIPI_DSI1_D3_N A9 MIPI_DSI1_VPH PHY — — — MIPI_DSI1_D3_P B9 MIPI_DSI1_VPH PHY — — — MIPI_REXT D8 MIPI_DSI1_VPH PHY — — — ONOFF A19 NVCC_BBSM_1P8 GPIO Alt0 BBSMMIX.ONOFF Input without PU / PD PDM_BIT_STREAM0 J17 NVCC_AON GPIO Alt5 GPIO1.IO[9] Input with PD PDM_BIT_STREAM1 G18 NVCC_AON GPIO Alt5 GPIO1.IO[10] Input with PD PDM_CLK G17 NVCC_AON GPIO Alt5 GPIO1.IO[8] Input with PD PMIC_ON_REQ A17 NVCC_BBSM_1P8 GPIO Alt0 BBSMMIX.PMIC_ON_REQ Output high without PU / PD PMIC_STBY_REQ B18 NVCC_BBSM_1P8 GPIO Alt0 BBSMMIX.PMIC_STBY_ REQ Output low without PU / PD POR_B A16 NVCC_BBSM_1P8 GPIO Alt0 BBSMMIX.POR_B Input without PU / PD RTC_XTALI E16 NVCC_BBSM_1P8 ANALOG Alt0 BBSMMIX.RTC — RTC_XTALO D16 NVCC_BBSM_1P8 ANALOG — — — SAI1_RXD0 H20 NVCC_AON GPIO Alt5 GPIO1.IO[14] Input with PD SAI1_TXC G20 NVCC_AON GPIO Alt5 GPIO1.IO[12] Input with PD SAI1_TXD0 H21 NVCC_AON GPIO Alt5 GPIO1.IO[13] CCMSRCGPCMIX.BOOT_ MODE[3] Input with PD SAI1_TXFS G21 NVCC_AON GPIO Alt5 GPIO1.IO[11] CCMSRCGPCMIX.BOOT_ MODE[2] Input with PD Table continues on the next page... NXP Semiconductors IMX93CEC i.MX 93 Applications Processors Data Sheet for Commercial Products IMX93CEC All information provided in this document is subject to legal disclaimers. © 2026 NXP B.V. All rights reserved. Product data sheet Rev. 7 — 12 February 2026 Document feedback 92 / 123 |
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