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IMX93CEC Datasheet(PDF) 22 Page - NXP Semiconductors |
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IMX93CEC Datasheet(HTML) 22 Page - NXP Semiconductors |
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22 / 123 page ![]() 4.2 Power modes This section introduces the power modes used in the i.MX 93. 4.2.1 Power mode definition The i.MX 93 supports the following power modes: • RUN Mode: All external power rails are on, the Cortex-A55 is active and running; other internal modules can be on/off based on application. • Low Power RUN Mode: This mode is defined as a very low power run mode with all external power rails are on. In this mode, all the unnecessary power domain (MIX) can be off, except AONMIX and the internal modules required, such as OSC24M/PLL. Cortex-M33 CPU in AONMIX handles all the computing and data processing. Cortex-A55 is power down and DRAM can be in self-refresh/retention mode. All the modules in the AONMIX, such as SAI/CAN/LPUART, can be used directly. To use modules in other power domain, such as WAKEUPMIX, the user can turn on additional peripherals and related power by Cortex-M33 as needed. Additional low power modes are also supported, but do not have power characterized in the Data Sheet. See the Reference Manual for a full set of power management capabilities. • IDLE Mode: This mode is defined as a mode, which the Cortex-A55 can automatically enter when there is no thread running and all high-speed devices are not active. The Cortex-A55 can be put into power gated state but with L3 data retained, DRAM and the bus clock are reduced. Most of the internal logic is clock gated, but still remains powered. Compared with RUN mode, all the external power rails from the PMIC remain the same and most of the modules still remain in their state, so the interrupt response in this mode is very small. • SUSPEND Mode: This mode is defined as the most power saving mode where all the clocks are off (including the Cortex-M33 CPU), all the unnecessary power supplies are off and all power gateable portions of the SoC are power gated. The Cortex-A55 CPU are fully power gated, all internal digital logic and analog circuit that can be powered down will be off, and all PHYs are power gated. DRAM is set at self-refresh/retention mode. VDD_SOC (and related digital supply) voltage is reduced to the "Suspend mode" voltage. The exit time from this mode will be much longer than IDLE, but the power consumption will also be much lower. • BBSM Mode: This mode is also called RTC mode. Only the power for the BBSM domain remains on to keep RTC and BBSM logic alive. • OFF Mode: All power rails are off. Note: Beyond the modes defined here, additional options can be configured in software, such as to adjust clock frequencies or gate clocks through the CCM programming model, or to adjust on-die power-gating through the SRC or GPC programming model, or to adjust the voltage supplied to the VDD_SOC supply as per Operating ranges in the Data Sheet. Table 21 summarizes the external power supply states in all the power modes. Table 21. The power supply states Power rail OFF BBSM SUSPEND (Analog on) IDLE RUN/LP RUN NVCC_BBSM_1P8 OFF ON ON ON ON VDD_SOC OFF OFF ON ON ON VDD2_DDR VDDQ_DDR OFF OFF ON ON ON NVCC_<XXX> OFF OFF ON ON ON Table continues on the next page... NXP Semiconductors IMX93CEC i.MX 93 Applications Processors Data Sheet for Commercial Products IMX93CEC All information provided in this document is subject to legal disclaimers. © 2026 NXP B.V. All rights reserved. Product data sheet Rev. 7 — 12 February 2026 Document feedback 22 / 123 |
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