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IMX93CEC Datasheet(PDF) 24 Page - NXP Semiconductors |
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IMX93CEC Datasheet(HTML) 24 Page - NXP Semiconductors |
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24 / 123 page ![]() Table 22. Low power mode definition ...continued IDLE SUSPEND BBSM NOC clock 133 MHz OFF OFF AXI clock 133 MHz OFF OFF Module clocks ON as needed OFF OFF EdgeLock® Secure Enclave ON ON ON GPIO Wakeup Yes Yes OFF RTC Wakeup Yes Yes Yes USB remote wakeup Yes No[1] No Other wakeup source Yes No[2] No WAKEUPMIX ON OFF[3] OFF MLMIX ON OFF OFF NICMIX ON as needed OFF OFF [1] USB remote wakeup can be "Yes" if required. [2] Other wakeup source can be "Yes" if required. [3] WAKEUPMIX can be "ON" if required. Note: • Automatic enter self-refresh when there is no DRAM access. • Put into self-refresh mode by software before entering low power mode. • Turn off externally by PMIC when PMIC_STBY_REQ signal is asserted. • Remote wakeup can be supported if the USB PHY power is on in this mode. 4.2.3 Chip power in different Low Power modes Table 23 shows power consumption in different LP modes. Table 23. Chip power in different LP modes Mode Supply Voltage (V) Power (mW)[1] BBSM NVCC_BBSM_1P8 1.8 0.14 SUSPEND NVCC_GPIO, NVCC_SD2 3.3 2.65 NVCC_WAKEUP [2] 1.8 1.20 VDDQ_DDR 0.6 < 0.01 VDD2_DDR 1.1 0.25 Table continues on the next page... NXP Semiconductors IMX93CEC i.MX 93 Applications Processors Data Sheet for Commercial Products IMX93CEC All information provided in this document is subject to legal disclaimers. © 2026 NXP B.V. All rights reserved. Product data sheet Rev. 7 — 12 February 2026 Document feedback 24 / 123 |
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