OR4 datasheet(37/152 Pages) LATTICE

37 / 152 page

Lattice Semiconductor

Data Sheet

May, 2006

ORCA Series 4 FPGAs

Programmable Input/Output Cells

(continued)

I/O Banks and Groups

Flexible I/O features allow the user to select the type of

I/O needed to meet different high-speed interface

requirements and these I/Os require different input ref-

erences or supply voltages. The perimeter of the device

is divided into eight banks of PIO buffers, as shown in

Figure 23, and for each bank there is a separate VDDIO

that supplies the correct input and output voltage for a

particular standard. The user must supply the appropri-

ate power supply to the VDDIO pin. Within a bank, sev-

eral I/O standards may be mixed as long as they use a

common VDDIO. The shaded section of the I/O banks in

Figure 23 (banks 2, 3, and 4) are removed for FPSCs,

to allow the embedded block to be placed on the side

of the FPGA array. Bank 1 and bank 5 are also

extended to the corners in FPSCs to incorporate more

FPGA I/Os.

Some interface standards require a speciﬁed threshold

voltage known as VREF. To accommodate various VREF

requirements, each bank is further divided into groups.

In these modes, where a particular VREF is required,

the device is automatically programmed to dedicate a

VREF pin for each group of PIOs within a bank. The

appropriate VREF voltage must be supplied by the user

and connected to the VREF pin for each group. The

VREF is dedicated exclusively to the group and cannot

be intermixed within the group with other signaling

requiring other VREF voltages. However, pins not

requiring VREF can be mixed in the same group. When

used to supply a reference voltage the VREF pad is no

longer available to the user for general use. The VREF

inputs should be well isolated to keep the reference

voltage at a consistent level.

Table 17. Compatible Mixed I/O Standards

0205(F).

Figure 23. ORCA High-Speed I/O Banks

Differential I/O (LVDS and LVPECL)

Series 4 devices support differential input, output, and

input/output capabilities through pairs of PIOs. The two

standards supported are LVDS and LVPECL.

The LVDS differential pair I/O standard allows for high-

speed, low-voltage swing and low-power interfaces

deﬁned by industry standards: ANSI/TIA/EIA-644 and

IEEE 1596.3 SSI-LVDS

. The general purpose standard

is supplied without the need for an input reference sup-

ply and uses a low switching voltage which translates

to low ac power dissipation.

The ORCA LVDS I/O provides an integrated 100 Ω ter-

mination resistor used to provide a differential voltage

across the inputs of the receiver. The on-chip integra-

tion provides termination of the LVDS receiver without

the need of discrete external board resistors. The user

has the programmable option to enable termination per

receiver pair for point-to-point applications or in multi-

point interfaces limit the use of termination to bussed

pairs. If the user chooses to terminate any differential

receiver, a single LVDS_R pin is dedicated to connect a

single 100 Ω (± 1%) resistor to VSS which then enables

an internal resistor matching circuit to provide a bal-

ance 100 Ω (± 10%) termination across all process,

voltage, and temperature. Experiments have also

shown that enabling this 100 Ω matching resistor for

LVDS outputs also improves performance.

VDDIO Bank

Voltage

Compatible Standards

3.3 V

LVTTL, SSTL3-I, SSTL3-II, GTL+,

GTL, LVPECL, PECL

2.5 V

LVCMOS2, SSTL2-I, SSTL2-II, LVDS

1.8 V

LVCMOS18

1.5 V

HSTL I, HSTL III, HSTL IV

PLC ARRAY

(TC)

(TL)

(BC)

(BL)

BANK 0

BANK 1

BANK 5

BANK 6

(TR)

(BR)

BANK 2

BANK 4

OR4 Datasheet(PDF) 37 Page - Lattice Semiconductor

OR4 Datasheet(HTML) 37 Page - Lattice Semiconductor

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL