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OR4 Datasheet(PDF) 62 Page - Lattice Semiconductor

Part # OR4
Description  ORCASeries 4 FPGAs
PDF  152 Pages
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Manufacturer  LATTICE [Lattice Semiconductor]
Direct Link  http://www.latticesemi.com
Logo LATTICE - Lattice Semiconductor

OR4 Datasheet(HTML) 62 Page - Lattice Semiconductor

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62
Lattice Semiconductor
Data Sheet
May, 2006
ORCA Series 4 FPGAs
Configuration Data Format (continued)
Configuration Data Frame
Configuration data can be presented to the FPGA in two frame formats: autoincrement and explicit. A detailed
description of the frame formats is shown in Figure 36, Figure 37, and Tables Table 31 and Table 31A. The two
modes are similar except that autoincrement mode uses assumed address incrementation to reduce the bit stream
size, and explicit mode uses an optional address frame. In both cases, the header frame begins with a series of 1s
and a preamble of 0010, followed by a 24-bit length count field representing the total number of configuration
clocks needed to complete the loading of the FPGAs. If only Series 4 devices are used, a second preamble value
of 0100 is supported. If this preamble is found, the Series 4 device will expect an expanded length count field of 32-
bits. This allows more larger Series 4 FPGAs to be configured through daisy-chaining.
Following the header frame is a mandatory ID frame. The ID frame contains data used to determine if the bit
stream is being loaded to the correct type of ORCA FPGA (i.e., a bit stream generated for an OR4E06 is being sent
to an OR4E06). Error checking is always enabled for Series 4 devices through the use of an 8-bit checksum. Fol-
lowing the ID frame is a 16-bit header to select the portion of the device to be configured with the following data. the
options are an FPGA header (shown in Table 32), an embedded RAM header (shown in Table 32A), and an FPSC
embedded block header (not shown).
A configuration data frame follows the header frame. A data frame starts with a 01-start bit pair and ends with
enough 1-stop bit to reach a byte boundary. If subsequent data frames follow the frame address is auto-incre-
mented. If using explicit mode, an address frame can follow a data frame, telling the FPGA at what address to
update the auto-increment counter to for the next data frame. Address frame starts with 00.
Following all data and address frames is the postamble. The format of the postamble is the same as an address
frame with the highest possible address value with the checksum set to all ones, if no other sections of configura-
tion data follow. If another section is to follow, the header starts with 10.
5-5759(F)
Figure 36. Serial Configuration Data Format—Autoincrement Mode
5-5760(F).a
Figure 37. Serial Configuration Data Format—Explicit Mode
CONFIGURATION DATA
CONFIGURATION DATA
10
01
01
PREAMBLE LENGTH
ID FRAME
CONFIGURATION
CONFIGURATION
POSTAMBLE
CONFIGURATION HEADER
00
00
COUNT
DATA FRAME 1
DATA FRAME 2
PREAMBLE LENGTH
ID FRAME
CONFIGURATION
CONFIGURATION
POSTAMBLE
CONFIGURATION HEADER
ADDRESS
00
COUNT
DATA FRAME 1
DATA FRAME 2
FRAME 1
CONFIGURATION DATA
CONFIGURATION DATA
10
0 1
0 1
00
00



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