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SH7727 Datasheet(PDF) 34 Page - Renesas Technology Corp |
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SH7727 Datasheet(HTML) 34 Page - Renesas Technology Corp |
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34 / 1109 page ![]() Rev. 5.00 Dec 12, 2005 page xxxiv of lxxii 3.3 TLB Functions .................................................................................................................. 105 3.3.1 Configuration of the TLB .................................................................................... 105 3.3.2 TLB Indexing....................................................................................................... 107 3.3.3 TLB Address Comparison ................................................................................... 108 3.3.4 Page Management Information ............................................................................ 110 3.4 MMU Functions................................................................................................................ 111 3.4.1 MMU Hardware Management ............................................................................. 111 3.4.2 MMU Software Management .............................................................................. 111 3.4.3 MMU Instruction (LDTLB)................................................................................. 112 3.4.4 Avoiding Synonym Problems .............................................................................. 113 3.5 MMU Exceptions.............................................................................................................. 116 3.5.1 TLB Miss Exception ............................................................................................ 116 3.5.2 TLB Protection Violation Exception ................................................................... 117 3.5.3 TLB Invalid Exception......................................................................................... 118 3.5.4 Initial Page Write Exception ................................................................................ 119 3.5.5 Processing Flow in Event of MMU Exception (Same Processing Flow for Address Error) ................................................................................................ 121 3.5.6 MMU Exception in Repeat Loop......................................................................... 123 3.6 Memory-Mapped TLB...................................................................................................... 124 3.6.1 Address Array ...................................................................................................... 125 3.6.2 Data Array............................................................................................................ 125 3.6.3 Usage Examples................................................................................................... 127 3.7 Usage Notes ...................................................................................................................... 128 Section 4 Exception Handling ......................................................................................... 131 4.1 Overview........................................................................................................................... 131 4.1.1 Features................................................................................................................ 131 4.1.2 Register Configuration......................................................................................... 131 4.2 Exception Handling Function ........................................................................................... 131 4.2.1 Exception Handling Flow .................................................................................... 131 4.2.2 Exception Handling Vector Addresses ................................................................ 132 4.2.3 Acceptance of Exceptions.................................................................................... 134 4.2.4 Exception Codes .................................................................................................. 136 4.2.5 Exception Request Masks .................................................................................... 137 4.2.6 Returning from Exception Handling.................................................................... 138 4.3 Register Description.......................................................................................................... 138 4.4 Exception Handling Operation.......................................................................................... 139 4.4.1 Reset..................................................................................................................... 139 4.4.2 Interrupts.............................................................................................................. 139 4.4.3 General Exceptions .............................................................................................. 140 4.5 Individual Exception Operations....................................................................................... 140 |
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