SH7727 datasheet(80/1109 Pages) RENESAS

Part #	SH7727

Description	Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7700 Series

PDF	1109 Pages

Scroll/Zoom	100%

Manufacturer	RENESAS [Renesas Technology Corp]

Direct Link	http://www.renesas.com

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80 / 1109 page

Section 1 Overview and Pin Functions

Rev. 5.00 Dec 12, 2005 page 8 of 1034

REJ09B0254-0500

1.2

Block Diagram

SuperH

CPU core

DSP core

Internal SRAM

(XY RAM)

instruction/data

for CPU/DSP

16 kbytes

Cache access

controller

(CCN)

Serial/

smart card

(SCI)

Real time

clock

(RTC)

Timer

(TMU)

Analog

front end

interface

(AFEIF)

2.4-kbyte

line buffer

SRAM

LCD display

controller

(LCDC)

512-byte

pallet SRAM

USB host controller

(USBH)

Li bus

state

controller

(LBSC)

Audio

CODEC

interface

(SIOF)

PC card

controller

(PCC)

USB

function

controller

(USBF)

Bus state

controller

(BSC)

512-byte

SRAM

128-byte

SRAM

288-byte

SRAM

Internal bus (I bus)

Peripheral bus (P bus)

Peripheral bus 1 (P1 bus)

Peripheral bus 2 (P2 bus)

LI bus

Internal bus 2 (I2 bus)

CPU bus (L bus)

Direct

memory access

controller

(DMAC)

Interrupt

controller

(INTC)

Peripheral bus

controller

Serial

communication

interface

(SCIF)

A/D

converter

(ADC)

D/A

converter

(DAC)

User

debug

interface

(H-UDI)

User

break

controller

(UBC)

Clock

pulse

generator

(CPG)

Cache memory

16 kbytes

Memory

management

unit

(MMU)

Figure 1.1 Block Diagram

SH7727 Datasheet(PDF) 80 Page - Renesas Technology Corp

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