SH7727 datasheet(37/1109 Pages) RENESAS

37 / 1109 page

Rev. 5.00 Dec 12, 2005 page xxxvii of lxxii

8.2.13 Break ASID Register A (BASRA)....................................................................... 221

8.2.14 Break ASID Register B (BASRB) ....................................................................... 221

8.3

Operation Description ....................................................................................................... 222

8.3.1

Flow of the User Break Operation ....................................................................... 222

8.3.2

Break on Instruction Fetch Cycle......................................................................... 222

8.3.3

Break by Data Access Cycle................................................................................ 223

8.3.4

Break on X/Y-Memory Bus Cycle....................................................................... 224

8.3.5

Sequential Break .................................................................................................. 224

8.3.6

Value of Saved Program Counter ........................................................................ 224

8.3.7

PC Trace .............................................................................................................. 225

8.3.8

Usage Examples................................................................................................... 227

8.3.9

Usage Notes ......................................................................................................... 231

Section 9 Power-Down Modes and Software Reset.................................................. 233

9.1

Overview........................................................................................................................... 233

9.1.1

Power-Down Modes ............................................................................................ 233

9.1.2

Pin Configuration................................................................................................. 235

9.1.3

9.2

Register Description.......................................................................................................... 236

9.2.1

Standby Control Register (STBCR)..................................................................... 236

9.2.2

Standby Control Register 2 (STBCR2)................................................................ 237

9.2.3

Standby Control Register 3 (STBCR3)................................................................ 239

9.2.4

Module Software Reset Register (SRSTR).......................................................... 241

9.3

Sleep Mode ....................................................................................................................... 243

9.3.1

Transition to Sleep Mode..................................................................................... 243

9.3.2

Canceling Sleep Mode ......................................................................................... 243

9.4

Standby Mode ................................................................................................................... 243

9.4.1

Transition to Standby Mode................................................................................. 243

9.4.2

Canceling Standby Mode..................................................................................... 245

9.4.3

Clock Pause Function .......................................................................................... 246

9.5

Module Standby Function ................................................................................................. 247

9.5.1

Transition to Module Standby Function............................................................... 247

9.5.2

Clearing the Module Standby Function ............................................................... 249

9.6

Timing of STATUS Pin Changes...................................................................................... 249

9.6.1

Timing for Resets................................................................................................. 249

9.6.2

Timing for Canceling Standbys ........................................................................... 250

9.6.3

Timing for Canceling Sleep Mode....................................................................... 252

9.7

Hardware Standby Mode .................................................................................................. 254

9.7.1

Transition to Hardware Standby Mode ................................................................ 254

9.7.2

Clearing the Hardware Standby Mode................................................................. 254

9.7.3

Timing of Hardware Standby Mode .................................................................... 255

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