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SH7727 Datasheet(PDF) 96 Page - Renesas Technology Corp |
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SH7727 Datasheet(HTML) 96 Page - Renesas Technology Corp |
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96 / 1109 page ![]() Section 2 CPU Rev. 5.00 Dec 12, 2005 page 24 of 1034 REJ09B0254-0500 A0G A1G 32 31 A0 A1 M0 M1 X0 X1 Y0 Y1 DSR MS ME MOD 0 (d) DSP mode register configuration (DSP = 1) Figure 2.2 Register Configuration in Each Processing Mode (2) Register values after a reset are shown in table 2.1. Table 2.1 Initial Register Values Type Registers Initial Value* General registers R0 to R15 Undefined Control registers SR MD bit = 1, RB bit = 1, BL bit = 1, I3 to I0 = 1111 (H'F), reserved bits = 0, others undefined GBR, SSR, SPC Undefined VBR H'00000000 RS, RE Undefined MOD Undefined System registers MACH, MACL, PR Undefined PC H'A0000000 DSP registers A0, A0G, A1, A1G, M0, M1, X0, X1, Y0, Y1 Undefined DSR H'00000000 Note: * Initialized by a power-on or manual reset. |
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