SH7727 datasheet(15/1109 Pages) RENESAS

15 / 1109 page

Rev. 5.00 Dec 12, 2005 page xv of lxxii

Page

Previous Version

Revised Version

436

CMCNT0 Count Timing

One of four clocks (P

φ/4, Pφ/8, Pφ/16,

φ/64) which are divided from the clock

φ) can be selected with the CKS1 and

CKS0 bits in CMCSR0. …

One of four peripheral clocks (P

φ/4, Pφ/8,

φ/16, Pφ/64) which are divided from the

clock (P

φ) can be selected with the CKS1

and CKS0 bits in CMCSR0. …

Figure 14.28 Count Timing

Internal clock

Peripheral clock (P

φ)

CMT clock

437

Figure 14.29 Timing of CMF Setting

Peripheral clock (P

φ)

Figure 14.30 Timing of CMF Clear by the

CPU

Peripheral clock (P

φ)

442

14.6 Usage Notes

Item 14, 15, added

443

15.1.1 Features

• Selection of six counter input clocks for

each channel:

On-chip RTC output clock (16 kHz), P

φ/4,

φ/16, Pφ/64, and Pφ/256

Note: P

φ is the internal clock for peripheral

modules and can be selected as 1/4, 1/2, or

the same frequency as that of the CPU

operating clock

φ.) See section 10, On-Chip

Oscillation Circuits, for more information on

the clock pulse generator.

• Selection of six counter input clocks for

each channel:

On-chip RTC output clock (16 kHz), P

φ/4,

φ/16, Pφ/64, and Pφ/256

Note deleted

• The maximum 2 MHz operating frequency

for the 32-bit counter in each channel:

Operate the SH7727 so that the clock input

to each channel timer counter does not

exceed the maximum operating frequency,

by dividing the external clock and internal

clock with the prescaler)

Operate the SH7727 so that the clock input

to each channel timer counter does not

exceed the maximum operating frequency,

by dividing the external clock and

peripheral clock (P

φ) with the prescaler.

SH7727 Datasheet(PDF) 15 Page - Renesas Technology Corp

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