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SH7727 Datasheet(PDF) 25 Page - Renesas Technology Corp

Part # SH7727
Description  Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7700 Series
PDF  1109 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

SH7727 Datasheet(HTML) 25 Page - Renesas Technology Corp

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Rev. 5.00 Dec 12, 2005 page xxv of lxxii
Page
Previous Version
Revised Version
933
Table 32.5 Clock Timing (1)
Conditions: VccQ = 2.6 to 3.6 V, Vcc = 1.6 to 2.05 V, AVcc = 3.3 ± 0.3 V, Ta = –20 to 75°C,
external bus maximum operating frequency = 33 MHz
Item
Symbol
Min
Max
Unit
Figure
EXTAL clock input frequency
EX
6
33
MHz
32.1
EXTAL clock input cycle time
tEXcyc
30.3
167
ns
EXTAL clock input low pulse width
EXL
7
—
ns
EXTAL clock input high pulse width
EXH
7
—
ns
EXTAL clock input rise time
t
t
t
EXR
—
6ns
EXTAL clock input fall time
tEXF
—
6ns
CKIO clock input frequency
CKI
24
33
MHz
32.2
CKIO clock input cycle time
t
t
t
CKIcyc
30.3
40
ns
CKIO clock input low pulse width
CKIL
7
—
ns
CKIO clock input high pulse width
CKIH
7
—
ns
CKIO clock input rise time
tCKIR
—
6ns
CKIO clock input fall time
tCKIF
—
6ns
CKIO clock output frequency
OP
24
33
MHz
32.3
CKIO clock output cycle time
tcyc
30.3
40
ns
f
f
f
Conditions: VccQ = 2.6 to 3.6 V, Vcc = 1.60 to 2.05 V, AVcc = 3.3 ± 0.3 V, Ta = –20 to 75°C,
100 MHz products
Item
Symbol
Min
Max
Unit
Figure
EXTAL clock input frequency
EX
6
33.34
MHz
32.3
EXTAL clock input cycle time
t
t
t
EXcyc
30
166.7
ns
EXTAL clock input low pulse width
EXL
9
—
ns
EXTAL clock input high pulse width
EXH
9
—
ns
EXTAL clock input rise time
tEXR
—
6ns
EXTAL clock input fall time
tEXF
—
6ns
CKIO clock input frequency
CKI
24
33.34
MHz
32.4
CKIO clock input cycle time
t
t
t
CKIcyc
30
41.7
ns
CKIO clock input low pulse width
CKIL
9
—
ns
CKIO clock input high pulse width
CKIH
9
—
ns
CKIO clock input rise time
tCKIR
—
6ns
CKIO clock input fall time
tCKIF
—
6ns
CKIO clock output frequency
OP
24
33.34
MHz
32.5
CKIO clock output cycle time
tcyc
30
41.7
ns
f
f
f
934
Table 32.5 Clock Timing (2)
Conditions: VccQ = 3.0 to 3.6 V, Vcc = 1.75 to 2.05 V, AVcc = 3.3 ± 0.3 V, Ta = –20 to 75°C,
external bus maximum operating frequency = 66.67 MHz
Item
Symbol
Min
Max
Unit
Figure
EXTAL clock input frequency
EX
6
66.67
MHz
32.1
EXTAL clock input cycle time
tEXcyc
15.2
15.2
1.5
1.5
167
ns
EXTAL clock input low pulse width
EXL
—
ns
EXTAL clock input high pulse width
EXH
—
1.5
1.5
—
—
ns
CKIO clock input frequency
CKI
24
66.67
MHz
32.2
CKIO clock input cycle time
t
t
CKIcyc
40
ns
CKIO clock input low pulse width
CKIL
ns
CKIO clock input high pulse width
CKIH
ns
CKIO clock output frequency
OP
24
66.67
MHz
32.3
CKIO clock output cycle time
tcyc
15.2
—
ns
Power-on oscillation settling time
tOSC1
10
—
ns
32.4
f
f
f
t
t
t
Table 32.6 Clock Timing (2)
Conditions: VccQ = 3.0 to 3.6 V, Vcc = 1.70 to 2.05 V, AVcc = 3.3 ± 0.3 V, Ta = –20 to 75°C,
100 MHz products
Item
Symbol
Min
Max
Unit
Figure
EXTAL clock input frequency
EX
6
50
MHz
32.3
EXTAL clock input cycle time
tEXcyc
20
166.7
ns
EXTAL clock input low pulse width
EXL
4
—
ns
EXTAL clock input high pulse width
EXH
4
—
ns
CKIO clock input frequency
CKI
24
50
MHz
32.4
CKIO clock input cycle time
t
t
CKIcyc
20
41.7
ns
CKIO clock input low pulse width
CKIL
4
—
ns
CKIO clock input high pulse width
CKIH
4
—
ns
CKIO clock output frequency
OP
24
50
MHz
32.5
CKIO clock output cycle time
tcyc
20
41.7
ns
Power-on oscillation settling time
tOSC1
10
—
ms
32.6
f
f
f
t
t
t
935
Table 32.7 Clock Timing (3)
Newly added
936
Table 32.8 Clock Timing (4)
Newly added
938
Figure 32.3 CKIO Clock Output Timing
tCK2D
tCK2D
VIH
CKIO2
(output)
tCK2OR
tCK2OF
Figure 32.5 CKIO Clock Output Timing
tCK2D
tCK2D
VOH
VOH
VOH
VOL
VOL
CKIO2
(output)
tCK2OR
tCK2OF



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