SH7727 datasheet(42/1109 Pages) RENESAS

42 / 1109 page

Rev. 5.00 Dec 12, 2005 page xlii of lxxii

16.2.14 Month Alarm Register (RMONAR) .................................................................... 468

16.2.15 RTC Control Register 1 (RCR1).......................................................................... 469

16.2.16 RTC Control Register 2 (RCR2).......................................................................... 470

16.3 RTC Operation.................................................................................................................. 473

16.3.1 Initial Settings of Registers after Power-On ........................................................ 473

16.3.2 Setting the Time................................................................................................... 473

16.3.3 Reading the Time................................................................................................. 475

16.3.4 Alarm Function .................................................................................................... 476

16.3.5 Crystal Oscillator Circuit ..................................................................................... 477

16.4 Usage Notes ...................................................................................................................... 478

16.4.1 Writing Registers During RTC Count Operation................................................. 478

16.4.2 RTC Periodic Interrupts....................................................................................... 478

16.4.3 Using the ADJ Bit in the Real Time Clock (RTC) .............................................. 479

Section 17 Serial Communication Interface (SCI) .................................................... 481

17.1 Overview........................................................................................................................... 481

17.1.1 Features................................................................................................................ 481

17.1.2 Block Diagram..................................................................................................... 482

17.1.3 Pin Configuration................................................................................................. 485

17.1.4 Register Configuration......................................................................................... 486

17.2 Register Descriptions ........................................................................................................ 487

17.2.1 Receive Shift Register (SCRSR).......................................................................... 487

17.2.2 Receive Data Register (SCRDR) ......................................................................... 487

17.2.3 Transmit Shift Register (SCTSR) ........................................................................ 488

17.2.4 Transmit Data Register (SCTDR)........................................................................ 488

17.2.5 Serial Mode Register (SCSMR)........................................................................... 489

17.2.6 Serial Control Register (SCSCR)......................................................................... 491

17.2.7 Serial Status Register (SCSSR)............................................................................ 495

17.2.8 Port SC Control Register (SCPCR)/Port SC Data Register (SCPDR) ................. 499

17.2.9 Bit Rate Register (SCBRR).................................................................................. 500

17.3 Operation........................................................................................................................... 509

17.3.1 Overview.............................................................................................................. 509

17.3.2 Operation in Asynchronous Mode ....................................................................... 511

17.3.3 Multiprocessor Communication........................................................................... 521

17.3.4 Clock Synchronous Operation ............................................................................. 529

17.4 SCI Interrupt Sources........................................................................................................ 538

17.5 Usage Notes ...................................................................................................................... 539

Section 18 Smart Card Interface ..................................................................................... 543

18.1 Overview........................................................................................................................... 543

18.1.1 Features................................................................................................................ 543

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