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SH7727 Datasheet(PDF) 70 Page - Renesas Technology Corp |
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SH7727 Datasheet(HTML) 70 Page - Renesas Technology Corp |
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70 / 1109 page ![]() Rev. 5.00 Dec 12, 2005 page lxx of lxxii Table 21.2 AFEIF Registers..................................................................................................... 659 Table 21.3 Telephone Number and Data.................................................................................. 669 Section 22 USB Pin Multiplex Controller Table 22.1 Pin Configuration (Digital Transceiver Signal)...................................................... 681 Table 22.2 Pin Configuration (Analog Transceiver Signal) ..................................................... 681 Table 22.3 Pin Configuration (Power Control signal).............................................................. 682 Table 22.4 Register Configuration ........................................................................................... 682 Section 23 USB Function Controller Table 23.1 Pin Configuration and Functions............................................................................ 692 Table 23.2 USB Function Module Registers............................................................................ 693 Table 23.3 Command Decoding on Application Side .............................................................. 717 Section 24 USB HOST Module Table 24.1 Pin Configuration ................................................................................................... 726 Table 24.2 Register Configuration ........................................................................................... 727 Section 25 LCD Controller Table 25.1 Pin Configuration ................................................................................................... 765 Table 25.2 Register Configuration ........................................................................................... 765 Table 25.3 Limits on the Resolution of Rotated Displays, Burst Length, and Connected Memory (32-bit Bus SDRAM) ...................................................... 792 Table 25.4 Limits on the Resolution of Rotated Displays, Burst Length, and Connected Memory (16-bit Bus SDRAM) ...................................................... 795 Table 25.5 Available Power-Supply Control-Sequence Periods at Typical Frame Rates ........ 805 Table 25.6 LCDC Operating Modes ........................................................................................ 806 Table 25.7 LCD Module Power-Supply States ........................................................................ 806 Section 26 Pin Function Controller (PFC) Table 26.1 List of Multiplexed Pins ......................................................................................... 821 Table 26.2 Pin Function Controller Registers .......................................................................... 826 Section 27 I/O Ports Table 27.1 Pin Function Controller Registers .......................................................................... 846 Table 27.2 Read/Write Operation of the Ports A to C, E, J, K Data Register .......................... 847 Table 27.3 Read/Write Operation of the Port D Data Register (PDDR) ................................. 849 Table 27.4 Read/Write Operation of the Ports F, M Data Register (PFDR, PMDR) ............... 850 Table 27.5 Read/Write Operation of the Port G Data Register (PGDR) .................................. 851 Table 27.6 Read/Write Operation of the Port H Data Register (PHDR) ................................. 853 Table 27.7 Read/Write Operation of the Port L Data Register (PLDR)................................... 854 |
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