HC210 datasheet(139/228 Pages) ALTERA

139 / 228 page

Altera Corporation

6–11

September 2008

Making Global Assignments

Making Global

Assignments

Initializing a HardCopy II Design

For a HardCopy II design, the following key operations are required after

a Quartus II project is created:

■

Specify design source files (Verilog, VHDL, AHDL, EDIF, and BDF

files)

■

Specify the Stratix II prototype target family and device name

■

Specify the HardCopy II companion revision and migration device

■

Enable the Design Assistant

■

Make recommended HardCopy II specific Quartus II tool settings

In addition to these, other project settings affecting downstream tools,

such as synthesis and place-and-route, can be made at this time.

The operations listed above are performed using the

set_global_assignment

command. The syntax for this command is:

tcl> set_global_assignment [-comment<comment>] \

[-disable] [-entity <entity_name>] -name <name> \

[-remove] [-section_id <section_id>] <value>

The most important parameters for the

set_global_assignment

command are <name> and <value>. The <name> argument specifies the

Quartus II global variable to be set and <value> is the new value assigned

to that variable.

One of the steps in initializing a HardCopy II design is to turn on the

Design Assistant. When run in the GUI, the Design Assistant provides a

visual checklist for running both the Stratix II and HardCopy II phases of

the design. For first-time users, this can provide a powerful guide for

successfully completing your HardCopy II project.

HC210 Datasheet(PDF) 139 Page - Altera Corporation