HC210 datasheet(161/228 Pages) ALTERA

161 / 228 page

Altera Corporation

6–33

September 2008

HardCopy II Example Tcl Script

Generate a HardCopy II Handoff Report

execute_hardcopyii -handoff_report

Archive the HardCopy II Handoff Files into

the file named "demo_design_hcii_handoff.qar"

execute_hardcopyii -archive demo_design_hcii_handoff.qar

## Quit quartus_sh -s

qexit

## End of demo_design.tcl

Global Assignments Script global_assignments.tcl

The

global_assignments.tcl script source in the top-level script,

demo_design.tcl prepares global variables, target devices, and

revision names for the HardCopy II project:

## global_assignments.tcl

## Source Design File Settings

## ===========================

set_global_assignment -name VERILOG_FILE demo_design.v

set_global_assignment -name VERILOG_FILE example_ram.v

## Constraint File Settings for TimeQuest

## ============================

set_global_assignment -name USE_TIMEQUEST_TIMING_ANALYZER ON

set_global_assignment -name SDC_FILE demo_design.sdc

## Stratix II Prototype FPGA Target Settings

## =========================================

set_global_assignment -name FAMILY "Stratix II"

set_global_assignment -name DEVICE EP2S90F1020C4

set_global_assignment -name TOP_LEVEL_ENTITY demo_design

## HardCopy II Companion Revision and Target Settings

## ==================================================

set_global_assignment -name COMPANION_REVISION_NAME \

demo_design_hardcopyii

set_global_assignment -name DEVICE_TECHNOLOGY_MIGRATION_LIST HC230F1020

## Design Assistant Assignments and Settings Required for HardCopy II

## ==================================================================

set_global_assignment -name ENABLE_DRC_SETTINGS ON

set_global_assignment -name ERROR_CHECK_FREQUENCY_DIVISOR 1

set_global_assignment -name REPORT_IO_PATHS_SEPARATELY ON

## The following assignments are Classic Timing Analyzer only and

## are not used by TimeQuest.

## ==================================================

set_global_assignment -name FLOW_ENABLE_TIMING_CONSTRAINT_CHECK ON

set_global_assignment -name DO_COMBINED_ANALYSIS ON

set_global_assignment -name IGNORE_CLOCK_SETTINGS OFF

HC210 Datasheet(PDF) 161 Page - Altera Corporation

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