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78M6612-IM/F/P Datasheet(PDF) 37 Page - Teridian Semiconductor Corporation |
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78M6612-IM/F/P Datasheet(HTML) 37 Page - Teridian Semiconductor Corporation |
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37 / 111 page ![]() DS_6612_001 78M6612 Data Sheet Rev. 1.2 37 Interrupt Priority 0 Register (IP0 Table 33: The ) IP0 – Register MSB LSB WDTS IP0[5] IP0[4] IP0[3] IP0[2] IP0[1] Note: WDTS is not used for interrupt controls. IP0[0] Interrupt Priority 1 Register (IP1 Table 34: The ) IP1 – Register MSB LSB – IP1[5] IP1[4] IP1[3] IP1[2] IP1[1] IP1[0] Table 35: Priority Levels IP1[x] IP0[x] 0 Priority Level 0 Level0 (lowest) 0 1 Level1 1 0 Level2 1 1 Level3 (highest) Table 36: Interrupt Polling Sequence External interrupt 0 Serial channel 1 interrupt Timer 0 interrupt External interrupt 2 External interrupt 1 External interrupt 3 Timer 1 interrupt External interrupt 4 Serial channel 0 interrupt External interrupt 5 External interrupt 6 |
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