78M6612-IMSLASHFSLASHP datasheet(82/111 Pages) TERIDIAN

82 / 111 page

78M6612 Data Sheet

DS_6612_001

Rev. 1.2

Name

Location

Rst

Dir

WAKE_ARM

Description

20A9[7]

–

Arm the autowake timer. W riting a 1 to this bit arms the

autowake timer and presets it with the values presently in

WAKE_PRD and WAKE_RES. The autowake timer is reset

and disarmed whenever the MPU is in MISSION mode or

BROW NOUT mode. The timer must be armed at least

three RTC cycles before the SLEEP or LCD-ONLY mode

is commanded.

WAKE_PRD

20A9[2:0]

001

–

R/W

Sleep time. Time=WAKE_PRD[2:0]*WAKE_RES.

Default=001. Maximum value is 7.

WAKE_RES

20A9[3]

–

R/W

Resolution of W AKE timer: 1 – 1 minute, 0 – 2.5

seconds.

WD_RST

SFRE8[7]

W D timer bit: Possible operations to this bit are:

Read: Gets the status of the flag IE_PLLFALL

W rite 0: Clears the flag.

W rite 1:.Resets the W DT.

WD_OVF

2002[2]

R/W

The W D overflow status bit. This bit is set when the W D

timer overflows. It is powered by the non-volatile supply

and at bootup will indicate if the part is recovering from a

W D overflow or a power fault. This bit should be cleared

by the MPU on bootup. It is also automatically cleared

when RESET is high.

201F[7:0]

–

W rite operations on the RTC registers must be preceded

by a write operation to WE.

78M6612-IM/F/P Datasheet(PDF) 82 Page - Teridian Semiconductor Corporation

78M6612-IM/F/P Datasheet(HTML) 82 Page - Teridian Semiconductor Corporation

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