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82G33 Datasheet(PDF) 259 Page - Intel Corporation

Part # 82G33
Description  Graphics and Memory Controller Hub
PDF  437 Pages
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Manufacturer  INTEL [Intel Corporation]
Direct Link  http://www.intel.com
Logo INTEL - Intel Corporation

82G33 Datasheet(HTML) 259 Page - Intel Corporation

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Integrated Graphics Device Registers (D2:F0,F1)
(Intel® 82Q35, 82Q33, 82G33 GMCH Only)
Datasheet
259
8.1.23
SSRW—Software Scratch Read Write
B/D/F/Type:
0/2/0/PCI
Address Offset:
58–5Bh
Default Value:
00000000h
Access:
RW
Size:
32 bits
Bit
Access &
Default
Description
31:0
RW
00000000h
Reserved
8.1.24
BSM—Base of Stolen Memory
B/D/F/Type:
0/2/0/PCI
Address Offset:
5C–5Fh
Default Value:
07800000h
Access:
RO
Size:
32 bits
Graphics Stolen Memory and TSEG are within DRAM space defined under TOLUD.
From the top of low used DRAM, GMCH claims 1 to 64 MBs of DRAM for internal
graphics if enabled.
The base of stolen memory will always be below 4 GB. This is required to prevent
aliasing between stolen range and the reclaim region.
Bit
Access &
Default
Description
31:20
RO
078h
Base of Stolen Memory (BSM): This register contains bits 31:20 of
the base address of stolen DRAM memory. The host interface
determines the base of Graphics Stolen memory by subtracting the
graphics stolen memory size from TOLUD. See Device 0 TOLUD for
more explanation.
19:0
RO
00000h
Reserved
8.1.25
HSRW—Hardware Scratch Read Write
B/D/F/Type:
0/2/0/PCI
Address Offset:
60–61h
Default Value:
0000h
Access:
RW
Size:
16 bits
Bit
Access &
Default
Description
15:0
RW
0000h
Reserved



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