82G33 datasheet(322/437 Pages) INTEL

322 / 437 page

Intel® Management Engine (ME) Subsystem Registers (D3:F0,F1,F2,F3)

322

Datasheet

9.3.9

PCMDBA—Primary Command Block IO Bar

B/D/F/Type:

0/3/2/PCI

Address Offset:

10–13h

Default Value:

00000001h

Access:

RO, RW

Size:

32 bits

This 8-byte I/O space is used in Native Mode for the Primary Controller's Command

Block (i.e., BAR0).

Note: Reset: Host system Reset or D3->D0 transition of the function.

Bit

Access &

Default

Description

31:16

0000h

Reserved

15:3

0000h

Base Address (BAR): This field provides the base address of the

BAR0 I/O space (8 consecutive I/O locations)

2:1

00b

Reserved

Resource Type Indicator (RTE): Indicates a request for I/O space.

9.3.10

PCTLBA—Primary Control Block Base Address

B/D/F/Type:

0/3/2/PCI

Address Offset:

14–17h

Default Value:

00000001h

Access:

RO, RW

Size:

32 bits

This 4-byte I/O space is used in Native Mode for the Primary Controller's Control Block

(i.e., BAR1).

Note: Reset: Host system Reset or D3->D0 transition of the function.

Bit

Access &

Default

Description

31:16

0000h

Reserved

15:2

0000h

Base Address (BAR): This field provides the base address of the

BAR1 I/O space (4 consecutive I/O locations)

Reserved

Resource Type Indicator (RTE): Indicates a request for I/O space

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