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82G33 Datasheet(PDF) 351 Page - Intel Corporation |
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82G33 Datasheet(HTML) 351 Page - Intel Corporation |
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351 / 437 page  Functional Description Datasheet 351 When the processor or the (G)MCH drives data, each 16-bit segment is analyzed. If more than 8 of the 16 signals would normally be driven low on the bus, the corresponding HDINV# signal will be asserted, and the data will be inverted prior to being driven on the bus. Whenever the processor or the (G)MCH receives data, it monitors FSB_DINVB_3:0 to determine if the corresponding data segment should be inverted. 10.1.4.1 APIC Cluster Mode Support APIC Cluster mode support is required for backwards compatibility with existing software, including various operating systems. As one example, beginning with Microsoft Windows 2000, there is a mode (boot.ini) that allows an end user to enable the use of cluster addressing support of the APIC. • The (G)MCH supports three types of interrupt re-direction: ⎯ Physical ⎯ Flat-Logical ⎯ Clustered-Logical |
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