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82G33 Datasheet(PDF) 367 Page - Intel Corporation

Part # 82G33
Description  Graphics and Memory Controller Hub
PDF  437 Pages
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Manufacturer  INTEL [Intel Corporation]
Direct Link  http://www.intel.com
Logo INTEL - Intel Corporation

82G33 Datasheet(HTML) 367 Page - Intel Corporation

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Functional Description
Datasheet
367
10.7
Power Management
10.7.1
ACPI
The GMCH supports ACPI 2.0 system power states S0, S1, S3, and S5; and processor
C0, C1, and C2 states. During S3, the GMCH VCC core, PCI Express, and processor
VTT voltage rails are powered down – also known as S3-Cold.
Table 10-5. Intel® G33 and P35 Express Chipset (G)MCH Voltage Rails
Host
State
VCC
VCC_CL
VCC_DDR
DDR2/DDR3
VCC_CKDDR
DDR2/DDR3
VCC_EXP
S0
1.25V
1.25V
1.8V / 1.5V
1.8V / 1.5V
1.25V
S1
1.25V
1.25V
1.8V / 1.5V
1.8V / 1.5V
1.25V
S3
0V
0V
1.8V / 1.5V
1.8V / 1.5V
0V
S5
0V
0V
0V
0V
0V
Table 10-6. Intel® Q35 and Q33 Express Chipset GMCH Voltage Rails
Host
State
ME
State
VCC
VCC_CL
VCC_DDR
VCC_CKDDR
VCC_EXP
S0
M0
1.25V
1.25V
1.8V
1.8V
1.25V
S1
M0
1.25V
1.25V
1.8V
1.8V
1.25V
S3
M1
0V
1.25V
1.8V
1.8V
0V
S3
Moff
Wake-on-ME
0V
0V
1.8V
1.8V
0V
S3
Moff
0V
0V
1.8V
1.8V
0V
S5
M1
0V
1.25V
1.8V
1.8V
0V
S3
Moff
Wake-on-ME
0V
0V
0V
0V
0V
S5
Moff
0V
0V
0V
0V
0V
The GMCH supports ACPI device power states D0, D1, D2, and D3 for the integrated
graphics device.
The GMCH supports ACPI device power states D0 and D3 for the PCI Express interface
10.7.2
PCI Express Active State Power Management
• PCI Express Link States: L0, L0s, L1, L2/L3 Ready, and L3.



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