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ADV7180WBSTZ Datasheet(PDF) 16 Page - Analog Devices |
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ADV7180WBSTZ Datasheet(HTML) 16 Page - Analog Devices |
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16 / 120 page  ADV7180 Data Sheet Rev. G | Page 16 of 120 Pin No. Mnemonic Type Description 38 VREFP O Internal Voltage Reference Output. See Figure 56 for recommended output circuitry. 39 VREFN O Internal Voltage Reference Output. See Figure 56 for recommended output circuitry. 40 AVDD P Analog Supply Voltage (1.8 V). 51 RESET I System Reset Input. Active low. A minimum low reset pulse width of 5 ms is required to reset the ADV7180 circuitry. 52 ALSB I This pin selects the I2C address for the ADV7180. For ALSB set to Logic 0, the address selected for a write is 0x40; for ALSB set to Logic 1, the address selected is 0x42. 53 SDATA I/O I2C Port Serial Data Input/Output Pin. 54 SCLK I I2C Port Serial Clock Input. The maximum clock rate is 400 kHz. 63 FIELD O Field Synchronization Output Signal. 64 VS O Vertical Synchronization Output Signal. |
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