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ADV7180WBSTZ Datasheet(PDF) 24 Page - Analog Devices

Part # ADV7180WBSTZ
Description  10-Bit, 4횞 Oversampling SDTV Video Decoder
PDF  120 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

ADV7180WBSTZ Datasheet(HTML) 24 Page - Analog Devices

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ADV7180
Data Sheet
Rev. G | Page 24 of 120
GLOBAL STATUS REGISTER
Four registers provide summary information about the video
decoder. The IDENT register allows the user to identify the
revision code of the ADV7180. The other three registers (0x10,
0x12, and 0x13) contain status bits from the ADV7180.
IDENTIFICATION
IDENT[7:0], Address 0x11[7:0]
This is the register identification of the ADV7180’s revision.
Table 19 describes the various versions of the ADV7180.
Table 19. IDENT CODE
IDENT[7:0]
Description
0x1B1
Initial release silicon
0x1C1
Improved ESD and PDC fix
0x1E
48-lead and 32-lead devices only
1
64-lead and 40-lead models only.
STATUS 1
Status 1[7:0], Address 0x10[7:0]
This read-only register provides information about the internal
status of the ADV7180.
See the CIL[2:0], Count Into Lock, Address 0x51[2:0] section
and the COL[2:0], Count Out of Lock, Address 0x51[5:3]
section for details on timing.
Depending on the setting of the FSCLE bit, the Status Register 0
and Status Register 1 are based solely on horizontal timing
information or on the horizontal timing and lock status of
the color subcarrier. See the FSCLE, fSC Lock Enable, Address
0x51[7] section.
AUTODETECTION RESULT
AD_RESULT[2:0], Address 0x10[6:4]
The AD_RESULT[2:0] bits report back on the findings from the
ADV7180 autodetection block. See the General Setup section for
more information on enabling the autodetection block and the
Autodetection of SD Modes section for more information on
how to configure it.
Table 20. AD_RESULT Function
AD_RESULT[2:0]
Description
000
NTSC M/J
001
NTSC 4.43
010
PAL M
011
PAL 60
100
PAL B/G/H/I/D
101
SECAM
110
PAL Combination N
111
SECAM 525
Table 21. Status 1 Function
Status 1[7:0]
Bit Name
Description
0
IN_LOCK
In lock (now)
1
LOST_LOCK
Lost lock (since last read of
this register)
2
FSC_LOCK
fSC locked (now)
3
FOLLOW_PW
AGC follows peak white
algorithm
4
AD_RESULT[0]
Result of autodetection
5
AD_RESULT[1]
Result of autodetection
6
AD_RESULT[2]
Result of autodetection
7
COL_KILL
Color kill active
STATUS 2
Status 2[7:0], Address 0x12[7:0]
Table 22. Status 2 Function
Status 2[7:0]
Bit Name
Description
0
MVCS DET
Detected Macrovision color
striping
1
MVCS T3
Macrovision color striping
protection; conforms to Type 3
if high, Type 2 if low
2
MV PS DET
Detected Macrovision pseudo-
sync pulses
3
MV AGC DET
Detected Macrovision AGC
pulses
4
LL NSTD
Line length is nonstandard
5
FSC NSTD
fSC frequency is nonstandard
6
Reserved
7
Reserved
STATUS 3
Status 3[7:0], Address 0x13[7:0]
Table 23. Status 3 Function
Status 3[7:0]
Bit Name
Description
0
INST_HLOCK
Horizontal lock indicator
(instantaneous)
1
GEMD
Gemstar detect
2
SD_OP_50Hz
Flags whether 50 Hz or 60 Hz is
present at output
3
Reserved
Reserved for future use
4
FREE_RUN_ACT
ADV7180 outputs a blue
screen (see the DEF_VAL_EN,
Default Value Enable,
Address 0x0C[0] section)
5
STD FLD LEN
Field length is correct for
currently selected video
standard
6
Interlaced
Interlaced video detected
(field sequence found)
7
PAL_SW_LOCK
Reliable sequence of
swinging bursts detected



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