MT312CSLASHCG datasheet(44/90 Pages) ZARLINK

44 / 90 page

MT312 QPSK Demodulator

6.2.2 QPSK Status. Registers 4 - 5 (R)

B7:

High = QPSK SNR MSB

B6:

High = QPSK SNR LSB

B5:

High = QPSK FR LOCK

B4:

High = QPSK Timing AGC LOCK

B3:

High = QPSK Timing LOCK

B2:

High = QPSK Carrier LOCK

B1:

High = QPSK Carrier and Timing (CT) Lock

B0:

High = QPSK LOCK

B7:

High = QPSK Timing sweep on

B6:

High = QPSK Carrier sweep on

B5-0:

Reserved

6.2.3 Symbol Rate Output. Registers 116 - 117 (R)

SYM RAT OP[15:0] These two bytes contain a positive number that is inversely proportional to the Symbol rate.

The decimation ratio index must also be read from the MONITOR register bits B[7:5] and divided by 32 to

normalise the result.

Rs =

* 2 -DEC RATIO

Where: Rs = Symbol rate in MBaud

PLL CLK = PLL clock frequency in MHz

SYM RAT OP = value of registers 116 and 117.

DEC RATIO = MONITOR H[7:5] when MON CTRL[2:0] = 5.

NAME

ADR

Def

hex

QPSK STAT H

QPSK STATUS[15:8] (high byte)

NAME

ADR

Def

hex

QPSK STAT L

QPSK STATUS[7:0] (low byte)

NAME

ADR

Def

hex

SYM RAT OP H

116

SYM RAT OP[15:8] Symbol Rate Output (high byte)

SYM RAT OP L

117

SYM RAT OP[7:0] Symbol Rate Output (low byte)

PLL_CLK *8192

SYM_RAT_OP+ 8192

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MT312C/CG Datasheet(PDF) 44 Page - Zarlink Semiconductor Inc

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