MT312CSLASHCG datasheet(36/90 Pages) ZARLINK

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MT312 QPSK Demodulator

6 QPSK demodulator

6.1 QPSK Demodulator Read/Write Registers

6.1.1 Symbol Rate. Registers 23 - 24 (R/W)

B15:

B14:

Reserved.

Must be set low

B14:

S FMT

Sweep MT312 Format.

If SYM RATE[15:14] = 0 this is the non-search mode, i.e. the known Symbol rate mode.

B13-0:

Required Symbol rate in Mbaud x 256. Unsigned 14 bit number. e.g. for a symbol

rate of 27.5 MBd

SYM RATE = 27.5 * 256 = 7040 = 1B80 (hex)

If any of the two DSS bits are set in the CONFIG register, then the SYM RATE register contents are ignored

and the symbol rate is taken as 20 MBaud. Hence it is not necessary to program the SYM RATE register for

DSS applications.

If SYM RATE[15:14] = 1x this is the Search Mode where x = don't care.

B11-0:

Sub-ranges to be searched (scaled by clock rate).

The total symbol rate range is divided into 12 sub-ranges. A bit in the above register pair is assigned to each

sub-range, as deﬁned in the tables below. The symbol rate sub-range or sub-ranges to be searched are deﬁned

by setting the appropriate bits high. Small overlaps are automatically provided between successive sub-ranges.

Note that the lowest sub-ranges have been provided for 90 MHz operation and the device has not been

optimised for operation below 1 MBaud.

NAME

ADR

Def

hex

SYM RATE H

Reserved

SYM RATE[13:8] in MBaud (high byte)

R/W

SYM RATE L

SYM RAT[7:0] in Mbaud (low byte)

R/W

MT312C/CG Datasheet(PDF) 36 Page - Zarlink Semiconductor Inc