MT312CSLASHCG datasheet(85/90 Pages) ZARLINK

85 / 90 page

MT312

14.2 Read Only Register Map

Writing to these registers will have no effect

NAME

ADR

Def

hex

Page

DISEQC2

CTRL2

122

MIN PULS PER

TONE EXT PER

MAX TONE PER

R/W

CONFIG

127

312 EN

DSS B

DSS A

BPSK

PLL FACTOR[1:0]

CRYS15

ADC

EXT

R/W

NAME

ADR

Def

hex

Page

QPSK INT H

QPSK INT[23:16] Interrupt QPSK (high byte)

QPSK INT M

QPSK INT [15:8] Interrupt QPSK (middle byte)

QPSK INT L

QPSK INT [7:0] Interrupt QPSK (low byte)

FEC INT

FEC INT[7:0] Interrupt FEC

QPSK STAT H

QPSK STATUS[15:8] (high byte)

QPSK STAT L

QPSK STATUS[7:0] (low byte)

FEC STATUS

FEC STATUS[7:0]

LNB FREQ H

LNB FREQ[15:8] Measured LNB frequency error (high byte)

LNB FREQ L

Reserved

LNB FREQ [7:0] Measured LNB frequency error (low byte)

M SNR H

M SNR[14:8] Measured SNR (high byte)

M SNR L

M SNR [7:0] Measured SNR (low byte)

VIT ERRCNT H

VIT ERRCNT[23:16] - Viterbi error count (high byte)

VIT ERRCNT M

VIT ERRCNT[15:8] - Viterbi error count (middle byte)

VIT ERRCNT L

VIT ERRCNT[7:0] - Viterbi error count (low byte)

RS BERCNT H

RS BERCNT[23:16] - Reed Solomon bit errors corrected (high byte)

RS BERCNT M

RS BERCNT[15:8] - Reed Solomon bit errors corrected (middle byte)

RS BERCNT L

RS BERCNT[7:0] - Reed Solomon bit errors corrected (low byte)

RS UBC H

RS UBC[15:8] - Reed Solomon uncorrected block errors (high byte)

RS UBC L

RS UBC[7:0] - Reed Solomon uncorrected block errors (low byte)

SIG LEVEL

SIG LEVEL[11:4] - Signal level at MT312 input

AGC H

108

AGC (23:16] - Front end AGC (high byte)

AGC M

109

AGC[15:8] - Front end AGC (middle byte)

AGC L

110

AGC[7:0] - Front end AGC (low byte)

FREQ ERR1 H

111

FREQ ERR1[23:16] Input frequency error course (high byte)

FREQ ERR1 M

112

FREQ ERR1[15:8] Input frequency error course (middle byte)

FREQ ERR1 L

113

FREQ ERR1[7:0] Input frequency error course (low byte)

FREQ ERR2 H

114

FREQ ERR2[15:8] Input frequency error ﬁne (high byte)

FREQ ERR2 L

115

FREQ ERR2[7:0] Input frequency error ﬁne (low byte)

SYM RAT OP H

116

SYM RAT OP[15:8] Symbol Rate Output (high byte)

SYM RAT OP L

117

SYM RAT OP[7:0] Symbol Rate Output (low byte)

DISEQC2 INT

118

DISEQC2 INT[7:0]

MT312C/CG Datasheet(PDF) 85 Page - Zarlink Semiconductor Inc

MT312C/CG Datasheet(HTML) 85 Page - Zarlink Semiconductor Inc

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