MT312CSLASHCG datasheet(18/90 Pages) ZARLINK

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MT312 Software Control

2 MT312 Software Control

This section describes the sequences of register

operations

needed

acquire

DVB

and

DSS

channels with known or unknown parameters.

Communication with the MT312 is via a standard 2-

wire bus and the ﬁrst byte following the chip address,

in write mode, is the register address (RADD).

The register map is organised to group important

Read registers at the lowest addresses, then the

main control Write registers in the next block of

addresses.

The

ﬁrst

written

must

the

Conﬁguration register, which has been placed at the

highest register address, because it is only written

once during the initialisation sequence.

The CONFIG register can only be reset by the

hardware reset. The MT312 is held in a power saving

mode following the hardware reset.

After a hardware reset, the MT312 must be taken out

of the power save mode by writing a one to the MSB

of the CONFIG register (see 1.1 Introduction). When

MT312 is not being used it can be put back into the

power save mode by writing a zero to the MSB of

CONFIG.

2.1 MT312 Register Map Overview

All write / read registers take on default values on full software reset, except for the conﬁguration register (127),

that is only reset to the default value by a hardware reset.

Address

Description

Section

Type

00 - 06

Interrupt and Status

5.1to 5.4-

read

07 - 19, 108 - 117, 123, 124

Primary signal monitors

5.5 to 5.17

read

20 - 39, 41, 96, 103

Primary control parameters

4 to 4.20

write / read

40, 42 - 49, 50 - 106, 125

Secondary parameters

11.1.1 to 11.1.52

write / read

107, 118 - 122

Secondary monitors

11.2.1 to 4.22

read

126

Chip identiﬁcation

5.18

read

127

Chip conﬁguration

4.22

write / read

Table 2 - MT312 register map overview

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