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MT312C/CG Datasheet(PDF) 84 Page - Zarlink Semiconductor Inc |
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MT312C/CG Datasheet(HTML) 84 Page - Zarlink Semiconductor Inc |
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84 / 90 page  MT312 Register Map 84 14 MT312 Register Map RADD is a virtual register with no address containing the address of the register to be accessed. It is written immediately after the 2-wire write address. 14.1 Read / Write Register Map NAME ADR B7 B6 B5 B4 B3 B2 B1 B0 Def hex RADD N/A IAI AD6 AD5 AD4 AD3 AD2 AD1 AD0 W - NAME ADR B7 B6 B5 B4 B3 B2 B1 B0 Def hex Page GPP CTRL 20 Reserved 2W PAS GPP DIR[2:0] GPP PIN[2:0] R/W 20 25 RESET 21 FR 312 PR 312 FR QP PR QP FR VIT PR VIT PR BA PR DS R/W 00 21 DISEQC MODE 22 Reserved HV DISEQC instruction length 22kHz mode R/W 00 30 SYM RATE H 23 SEARCH Reserved SYM RATE[13:8] in MBaud )high byte) R/W 1B 36 SYM RATE L 24 SYM RATE[7:0] in MBaud (low byte) R/W 80 36 VIT MODE 25 AUT IQ V IQ SP CR 7/8 CR 6/7 CR 5/6 CR 3/4 CR 2/3 CR 1/2 R/W 44 38 QPSK CTRL 26 Reserved Q IQ SP Reserved Reserved Reserved AFC M Reserved ROLL 20 R/W 00 39 GO 27 Reserved GO R/W 00 40 IE QPSK H 28 IE QPSK[23:16] Interrupt enable QPSK (high byte) R/W 00 40 IE QPSK M 29 IE QPSK[15:8] Interrupt enable QPSK (middle byte) R/W 00 40 IE QPSK L 30 IE QPSK[7:0] Interrupt enable QPSK (low byte) R/W 00 40 IE FEC 31 IE FEC[7:0] Interrupt enable FEC R/W 00 47 QPSK STAT EN 32 QPSK STAT EN[7:0] Enable various QPSK outputs on STATUS pin R/W 00 41 FEC STAT EN 33 MOCLK RATIO[3:0] DS Lock BA lock VIT lock BER tog R/W 14 47 SYS CLK 34 SYS CLK[7:0] - System clock frequency x2 in MHz R/W 00 23 DISEQC RATIO 35 DISEQC RATIO[7:0] R/W 00 30 DISEQC INSTR 36 DISEQC Instruction[7:0] R/W 00 31 FR LIM 37 Reserved FR LIM[6:0] - Freq. Limit in MHz R/W 00 26 FR OFF 38 FR OFF[7:0] - Freq. Offset in MHz R/W 00 27 AGC CTRL 39 Reserved Reserved AGC SD[1:0] AGC BW[2:0] AGC SL R/W 26 52 AGC REF 41 AGC REF[7:0] AGC reference level R/W 67 52 OP CTRL 96 MANUAL MOCLK BKERIV MCLKINV EN TEI BSO BA LK[2:0] R/W 03 59 FEC SETUP 97 DIS SR ENCLKO DIS DS DIS RS DIS VIT EN PRS DS LK[1:0] R/W 00 48 MON CTRL 103 ERR IND Reserved MON CTRL[3:0] Monitor control R/W 00 59 DISEQC2 CTRL1 121 DISEQC2 CTRL1[7:8] R/W 00 31 |
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