MT312CSLASHCG datasheet(77/90 Pages) ZARLINK

77 / 90 page

Microprocessor Control

MT312

11.6 Primary 2-Wire Bus Timing

Where:

S = Start

Sr = Restart, i.e. Start without stopping ﬁrst.

P = Stop.

Note 1.The rise time depends on the external bus pull up resistor.

Parameter: Primary 2-wire bus only

Symbol

Value

Unit

Min

Max

CLK1 clock frequency

fCLK

450

kHz

Bus free time between a STOP and START condition.

tBUFF

200

Hold time (repeated) START condition.

tHD;STA

200

LOW period of CLK1 clock.

tLOW

450

HIGH period of CLK1 clock.

tHIGH

600

Set-up time for a repeated START condition.

tSU;STA

200

Data hold time (when input).

tHD;DAT

100

Data set-up time

tSU;DAT

100

Rise time of both CLK1 and DATA1 signals.

note 1

Rise time of both CLK1 and DATA1 signals, (100pF to ground)

Set-up time for a STOP condition.

tSU;STO

200

Table 8 - Primary 2-wire bus timing

DATA1

CLK1

tHD;STA

tHD;DAT

tHIGH

tSU;DAT tSU;STA

tSU;STO

tLOW

tBUFF

Figure 26 - One DiSEqC™ data byte - 0x11 (hex) plus parity bit

MT312C/CG Datasheet(PDF) 77 Page - Zarlink Semiconductor Inc

MT312C/CG Datasheet(HTML) 77 Page - Zarlink Semiconductor Inc

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90

Datasheet Download

Link URL