MT312CSLASHCG datasheet(33/90 Pages) ZARLINK

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DiSEqC Control

MT312

B[1-0]:

MAX TONE PER

Maximum Tone Period.

5.3 DiSEqC Control Read Registers

5.3.1 DiSEqC™M 2 Interrupt Indicators. Register 118 (R)

Note that the most signiﬁcant four bits are not reset on read. The least signiﬁcant four bits are interrupt bits

which are reset when the register is read. Interrupts indicate events in history. The interrupts may be enabled to

drive the IRQ pin 57 by setting required bit(s) in the DISEQC2 CTRL1 register 121, see 31.

B7-4:

Bits B7-4 denote the following number of bytes received:

B7-4 = (Number of bytes received - Number of bytes read)

Hence this is the number of bytes that would be in the FIFO BUFFER if this buffer had unlimited

capacity. Since the size of this buffer is only 8 bytes, if the above difference, given by bits B7-4,

exceeds eight, that indicates buffer overﬂow.

B3:

Silent period exceeds 176 ms interrupt (reset on read)

The host may enable interrupts B1 and B3. Then when an interrupt is received, the host may read the

DISEQC2 INT register. Then if bit B3 is one and bit B1 is 0, this indicates there has been a

continuous period 176ms of silence since the end of the transmission. If the host is expecting a reply,

then this silence may be taken to signify a hardware fault in the system.

There is a 5-bit number in the DISEQC2 STATUS BYTE which indicates the length of a continuous

period of silence up to the read time, in multiples of 16 ms.

B2:

Receive error interrupt (reset on read).

Bit B2 indicates an error in the received message. This does not refer to a parity error. It indicates

that a bit has been lost due to excessive noise or interference in the return channel. This is identiﬁed

within MT312 by the occurrence of an excessively long tone or silence period within a byte.

101

12 * DISEQC RATIO

(default)

110

13 * DISEQC RATIO

111

14 * DISEQC RATIO

B1-0:

MAX TONE PER

6.0 * DISEQC RATIO

(default)

6.25 * DISEQC RATIO

5.75 * DISEQC RATIO

5.5 * DISEQC RATIO

NAME

ADR

Def

hex

DISEQC2 INT

118

DISEQC2 INT[7:0]

B1-0:

TONE EXT PER

MT312C/CG Datasheet(PDF) 33 Page - Zarlink Semiconductor Inc

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