MT312CSLASHCG datasheet(30/90 Pages) ZARLINK

30 / 90 page

MT312 DiSEqC Control

5.2 DiSEqC Control Read/Write Registers

5.2.1 DiSEqC™ Mode Control. Register 22 (R/W)

B7:

Reserved.

Must be set low.

B6:

HV H/V polarisation control: High = Horizontal, DISEQC[1] pin = high

Low = Vertical, DISEQC[1] pin = low

The DISEQC[1] pin controls the externally generated 13/18V LNB voltage.

B5-3:

Number of bytes in DiSEqC™ instruction minus 1, to output on DISEQC[0] pin.

i.e. if the message contains four bytes, program B5-3 with the value three.

B2-0:

DiSEqC™ mode:

22kHz off

22kHz on continuous

Burst mode - on for 12.5ms = '0'

Burst mode - modulated 1:2 for 12.5ms = '1'

Modulated with bytes from DISEQC INSTR

5-7:

Reserved.

Note:

for modes 2 and 3, an interrupt is generated 16ms after the '0' or '1' burst.

for mode 4, there is a 16ms delay before the message bytes, then an interrupt is generated 16ms after

the last message byte has been sent. The requisite number of bytes must be pre-loaded into

DISEQC INSTR (register 36) before this bit is set, see 31.

5.2.2 DiSEqC(tm) Ratio. Register 35 (R/W)

DISEQC RATIO[7:0] This must be programmed to set the Diseqc output tone frequency.

Fout =

Where Fout is in kHz and Fxtal is in MHz.

For a 22kHz output tone, DISEQC RATIO[7:0] = 11.364 * Fxtal

e.g. with Fxtal = 10MHz, DISEQC RATIO[7:0] = 114, or for 15 MHz 170.

NAME

ADR

Def

hex

DISEQC MODE

Reserved

DISEQC

instruction length

22kHz mode

R/W

NAME

ADR

Def

hex

DISEQC RATIO

DISEQC RATIO[7:0]

R/W

4*DISEQC_RATIO[7:0]

Fxtal

MT312C/CG Datasheet(PDF) 30 Page - Zarlink Semiconductor Inc

MT312C/CG Datasheet(HTML) 30 Page - Zarlink Semiconductor Inc

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90

Datasheet Download

Link URL