DM504 datasheet(128/211 Pages) TI1

128 / 211 page

DCANx_RX

DCANx_TX

SPRS91v_DCAN_01

128

DM504

SPRS977A – NOVEMBER 2016 – REVISED JANUARY 2017

www.ti.com

Submit Documentation Feedback

Specifications

(1) H = period of baud rate, 1/programmed baud rate.

Figure 5-29. DCAN and MCAN Timings

CAUTION

The IO timings provided in this section are only valid if signals within a single

IOSET are used. The IOSETs are defined in Table 5-55.

In Table 5-55 are presented the specific groupings of signals (IOSET) for use with DCAN and MCAN.

Table 5-55. DCAN and MCAN IOSETs

SIGNALS

IOSET1

IOSET2

IOSET3

IOSET4

BALL

MUX

BALL

MUX

BALL

MUX

BALL

MUX

DCAN1

dcan1_tx

dcan1_rx

MCAN

mcan_tx

mcan_rx

5.9.6.13 GMAC_SW

The one-port gigabit ethernet switch subsystem (GMAC_SW) provides ethernet packet communication

and can be configured as an ethernet switch. It provides Reduced Gigabit Media Independent Interface

(RGMII) and the Management Data Input/Output (MDIO) for physical layer device (PHY) management.

NOTE

For more information, see the Gigabit Ethernet Switch (GMAC_SW) section of the Device

TRM.

NOTE

The Gigabit, Reduced and Media Independent Interface n (n = 0) are also referred to as

RGMIIn

5.9.6.13.1 GMAC MDIO Interface Timings

Table 5-56, Table 5-56 and Figure 5-30 present timing requirements for MDIO.

DM504 Datasheet(PDF) 128 Page - Texas Instruments

DM504 Datasheet(HTML) 128 Page - Texas Instruments

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL