DM504 datasheet(145/211 Pages) TI1

145 / 211 page

145

DM504

www.ti.com

SPRS977A – NOVEMBER 2016 – REVISED JANUARY 2017

Submit Documentation Feedback

Detailed Description

•

Bit count and rotate hardware extends support for bit-level algorithms.

•

Compact instructions: Common instructions (AND, ADD, LD, MPY) have 16-bit versions to reduce

code size.

•

Protected mode operation: A two-level system of privileged program execution to support higher-

capability operating systems and system features such as memory protection.

•

Exceptions support for error detection and program redirection to provide robust code execution

•

Hardware support for modulo loop operation to reduce code size and allow interrupts during fully-

pipelined code

•

Each multiplier can perform 32 × 32 bit multiplies

•

Additional instructions to support complex multiplies allowing up to eight 16-bit multiply/add/subtracts

per clock cycle

The TMS320C66x has the following key improvements to the ISA:

•

4x Multiply Accumulate improvement for both fixed and floating point

•

Improvement of the floating point arithmetic

•

Enhancement of the vector processing capability for fixed and floating point

•

Addition of domain-specific instructions for complex arithmetic and matrix operations

On the C66x ISA, the vector processing capability is improved by extending the width of the SIMD

instructions. The C674x DSP supports 2-way SIMD operations for 16-bit data and 4-way SIMD

operations for 8-bit data. C66x enhances this capabilities with the addition of SIMD instructions for 32-bit

data allowing operation on 128-bit vectors. For example the QMPY32 instruction is able to perform the

element to element multiplication between two vectors of four 32-bit data each.

C66x ISA includes a set of specific instructions to handle complex arithmetic and matrix operations.

DM504 Datasheet(PDF) 145 Page - Texas Instruments