DM504 datasheet(162/211 Pages) TI1

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DM504

SPRS977A – NOVEMBER 2016 – REVISED JANUARY 2017

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Detailed Description

6.10.9 QSPI

The quad serial peripheral interface (QSPI™) module is a kind of SPI module that allows single, dual, or

quad read access to external SPI devices. This module has a memory mapped register interface, which

provides a direct interface for accessing data from external SPI devices and thus simplifying software

requirements. The QSPI works as a master only.

The QSPI supports the following features:

•

General SPI features:

–

Programmable clock divider

–

Six pin interface

–

Programmable length (from 1 to 128 bits) of the words transferred

–

Programmable number (from 1 to 4096) of the words transferred

–

4 external chip-select signals

–

Support for 3-, 4-, or 6-pin SPI interface

–

Optional interrupt generation on word or frame (number of words) completion

–

Programmable delay between chip select activation and output data from 0 to 3 QSPI clock cycles

–

Programmable signal polarities

–

Programmable active clock edge

–

Software-controllable interface allowing for any type of SPI transfer

–

Control through L3_MAIN configuration port

•

Serial flash interface (SFI) features:

–

Serial flash read/write interface

–

Additional registers for defining read and write commands to the external serial flash device

–

1 to 4 address bytes

–

Fast read support, where fast read requires dummy bytes after address bytes; 0 to 3 dummy bytes

can be configured.

–

Dual read support

–

Quad read support

–

Little-endian support only

–

Linear increment addressing mode only

The QSPI supports only dual and quad reads. Dual or quad writes are not supported. In addition, there is

no "pass through" mode supported where the data present on the QSPI input is sent to its output.

For more information, see section Quad Serial Peripheral Interface in chapter Serial Communication

Interfaces of the device TRM.

6.10.10 McASP

The McASP functions as a general-purpose audio serial port optimized to the requirements of various

audio applications. The McASP module can operate in both transmit and receive modes. The McASP is

useful for time-division multiplexed (TDM) stream, Inter-IC Sound (I2S) protocols reception and

transmission as well as for an intercomponent digital audio interface transmission (DIT). The McASP has

the flexibility to gluelessly connect to a Sony/Philips digital interface (S/PDIF) transmit physical layer

component.

Although intercomponent digital audio interface reception (DIR) mode (i.e. S/PDIF stream receiving) is not

natively supported by the McASP module, a specific TDM mode implementation for the McASP receivers

allows an easy connection to external DIR components (for example, S/PDIF to I2S format converters).

The device has integrated 3 McASP modules with:

•

McASP1 supports 16 channels with independent TX/RX clock/sync domain

•

McASP2 and McASP3 support 6 channels with independent TX/RX clock/sync domain

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