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ELANSC520 Datasheet(PDF) 156 Page - Advanced Micro Devices |
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ELANSC520 Datasheet(HTML) 156 Page - Advanced Micro Devices |
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156 / 440 page ![]() GP DMA Controller Registers 11-24 Élan™SC520 Microcontroller Register Set Manual Buffer Chaining Interrupt Enable (GPDMABSINTENB) Memory-Mapped MMCR Offset D9Ah Register Description This register provides the interrupt enable bits for the buffer chaining interrupts. An interrupt is generated when the GP bus DMA controller completes the transfer that is in progress. Software can use this interrupt to queue up a subsequent transfer. Bit Definitions Programming Notes Before buffer chaining interrupts are enabled, the DMABCINTMAP register (see page 12-21) must be configured to route the interrupt to the appropriate interrupt request level and priority. Buffer chaining is enabled separately for each channel in the GPDMABCCTL register (see page 11-21). 7 6 5 4 3 2 1 0 Bit Reserved CH7_INT_ ENB CH6_INT_ ENB CH5_INT_ ENB CH3_INT_ ENB Reset 00000000 R/W RSV R/W R/W R/W R/W Bit Name Function 7 –4 Reserved Reserved This bit field should be written to 0 for normal system operation. 3 CH7_INT_ ENB Interrupt Enable for Channel 7 This bit is applicable only if the Buffer Chaining feature is enabled for this channel. 0 = End-of-buffer interrupt for this channel is disabled. 1 = End-of-buffer interrupt for this channel is enabled. 2 CH6_INT_ ENB Interrupt Enable for Channel 6 This bit is applicable only if the Buffer Chaining feature is enabled for this channel. 0 = End-of-buffer interrupt for this channel is disabled. 1 = End-of-buffer interrupt for this channel is enabled. 1 CH5_INT_ ENB Interrupt Enable for Channel 5 This bit is applicable only if the Buffer Chaining feature is enabled for this channel. 0 = End-of-buffer interrupt for this channel is disabled. 1 = End-of-buffer interrupt for this channel is enabled. 0 CH3_INT_ ENB Interrupt Enable for Channel 3 This bit is applicable only if the Buffer Chaining feature is enabled for this channel. 0 = End-of-buffer interrupt for this channel is disabled. 1 = End-of-buffer interrupt for this channel is enabled. |
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