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8101 Datasheet(PDF) 5 Page - LSI Computer Systems |
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8101 Datasheet(HTML) 5 Page - LSI Computer Systems |
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5 / 172 page ![]() Preface v Copyright © 2000–2001 by LSI Logic Corporation. All rights reserved. MIB Management Information Base MLT3 Multilevel Transmission (3 levels) MSB Most Significant Bit mV millivolt NLP Normal Link Pulse NRZI Nonreturn to Zero Inverted NRZ Nonreturn to Zero OP Opcode PCB Printed Circuit Board pF picofarad PRE Preamble R/LH Read Latched High R/LHI Read Latched High with Interrupt R/LL Read Latched Low R/LLI Read Latched Low with Interrupt R/LT Read Latched Transition R/LTI Read Latched Transition with Interrupt R/WSC Read/Write Self Clearing RFC Request for Comments RJ-45 Registered Jack-45 RMON Remote Monitoring SA Start Address or Station Address SFD Start of Frame Delimiter SNMP Simple Network Management Protocol SOI Start of Idle Split-32 Independent 32-bit input and output busses; one for transmit and one for receive SSD Start of Stream Delimiter STP Shielded Twisted Pair TP Twisted Pair µH microHenry µP microprocessor UTP Unshielded Twisted Pair Conventions Used in This Manual The first time a word or phrase is defined in this manual, it is italicized. |
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