8101 datasheet(83/172 Pages) LSI

83 / 172 page

System Interface Signals

3-5

RXWM1

Receive FIFO Watermark 1

Output

When RXWM1 is LOW, the receive FIFO data is less

than or equal to the receive FIFO watermark 1 threshold.

When HIGH, the receive FIFO data is greater than the

watermark. RXWM1 is clocked out on the rising edge of

the system clock, SCLK. Data is valid on RXD[31:0] when

either RXWM1 or RXWM2 is asserted, independent of

RXENn.

RXWM2

Receive FIFO Watermark 2

Output

When RXWM2 is LOW, the receive FIFO data is less

than or equal to the receive FIFO watermark 2 threshold

and no EOF in FIFO. When HIGH, the receive FIFO data

is greater than the watermark. RXWM2 is clocked out on

the rising edge of the system clock, SCLK. Data is valid

on RXD[31:0] when either RXWM1 or RXWM2 is

asserted, independent of RXENn.

SCLK

System Interface Clock

Input

This input clocks data in and out of the transmit and

receive FIFOs on TXD[31:0] and RXD[31:0], respectively.

All system interface inputs and outputs are also clocked

in and out on the rising edge of SCLK, with the exception

of RXOEn. SCLK clock frequency must be between

33–66 MHz.

TXBE[3:0]

Transmit Byte Enable

Input

These inputs determine which bytes of the current 32-bit

word on TXD[31:0] contain valid data. TXBE[3:0] is

clocked into the device on the rising edge of the system

interface clock, SCLK.

TXCRCn

Transmit CRC Enable

Input

When TXCRC is LOW, CRC is calculated and appended

to the current packet being input on the system interface.

When TXCRC is HIGH, CRC is not calculated. TXCRCn

is clocked in on the rising edge of the system clock,

SCLK, and must be asserted on the same SCLK clock

cycle as TXSOF.

TXD[31:0]

Transmit Data

Input

This input bus contains the 32-bit data word that is

clocked into the transmit FIFO on the rising edge of the

system interface clock, SCLK.

8101 Datasheet(PDF) 83 Page - LSI Computer Systems

8101 Datasheet(HTML) 83 Page - LSI Computer Systems

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL