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8101 Datasheet(PDF) 76 Page - LSI Computer Systems |
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8101 Datasheet(HTML) 76 Page - LSI Computer Systems |
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76 / 172 page ![]() 2-58 Functional Description Copyright © 2000–2001 by LSI Logic Corporation. All rights reserved. 2.19.3 Counter Rollover Counters normally roll over to zero when they exceed their maximum count, (receive an increment when counter is at maximum count). The counters can be programmed to freeze and stop counting once they reach their maximum count. Setting the CTR_ROLL bit in “Register 9– Configuration 3‚" Section 4.3.10, programs the counters to freeze when they reach their maximum count. 2.19.4 Counter Maximum Packet Size The maximum packet size used for the management counter statistics can be programmed to be one of four values. Setting the CMXPKT[1:0] bits in “Register 10–Configuration 4‚" Section 4.3.11, select the maximum packet size. This selection is described in the register descriptions for those registers and is also summarized in Table 2.15. The bits in Table 2.15 affect the maximum packet size for the counters only; the maximum packet size for the MAC section is described in Section 2.8, “Receive MAC”. 2.19.5 Counter Reset Setting the CTRRST bit in “Register 7–Configuration 1‚" Section 4.3.8, resets all counters to zero. Asserting the controller reset pin, RESETn, also resets the counters to zero. Table 2.15 Counter Maximum Packet Size Selection CMXPKT [1:0] Maximum Packet Size (bytes) 11 Unlimited 10 1535 01 1522 00 1518 |
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